Commit 02eab44c authored by Will Deacon's avatar Will Deacon
Browse files

Merge branch 'for-next/misc' into for-next/core 

* for-next/misc:
  arm64/mm: use GENMASK_ULL for TTBR_BADDR_MASK_52
  arm64: numa: Don't check node against MAX_NUMNODES
  arm64: mm: Remove assembly DMA cache maintenance wrappers
  arm64/mm: Define defer_reserve_crashkernel()
  arm64: fix oops in concurrently setting insn_emulation sysctls
  arm64: Do not forget syscall when starting a new thread.
  arm64: boot: add zstd support
parents 8184a8bc 19198abf

arch/arm64/boot/Makefile

+4 −1
Original line number Diff line number Diff line
@@ -16,7 +16,7 @@ 


OBJCOPYFLAGS_Image :=-O binary -R .note -R .note.gnu.build-id -R .comment -S



targets := Image Image.bz2 Image.gz Image.lz4 Image.lzma Image.lzo

targets := Image Image.bz2 Image.gz Image.lz4 Image.lzma Image.lzo Image.zst



$(obj)/Image: vmlinux FORCE

	$(call if_changed,objcopy)
@@ -35,3 +35,6 @@ $(obj)/Image.lzma: $(obj)/Image FORCE 


$(obj)/Image.lzo: $(obj)/Image FORCE

	$(call if_changed,lzo)



$(obj)/Image.zst: $(obj)/Image FORCE

	$(call if_changed,zstd)

arch/arm64/include/asm/cacheflush.h

+0 −7
Original line number Diff line number Diff line
@@ -104,13 +104,6 @@ static inline void flush_icache_range(unsigned long start, unsigned long end) 
}

#define flush_icache_range flush_icache_range



/*

 * Cache maintenance functions used by the DMA API. No to be used directly.

 */

extern void __dma_map_area(const void *, size_t, int);

extern void __dma_unmap_area(const void *, size_t, int);

extern void __dma_flush_area(const void *, size_t);



/*

 * Copy user data from/to a page which is mapped into a different

 * processes address space.  Really, we want to allow our "user

arch/arm64/include/asm/memory.h

+5 −0
Original line number Diff line number Diff line
@@ -351,6 +351,11 @@ static inline void *phys_to_virt(phys_addr_t x) 
})



void dump_mem_limit(void);



static inline bool defer_reserve_crashkernel(void)

{

	return IS_ENABLED(CONFIG_ZONE_DMA) || IS_ENABLED(CONFIG_ZONE_DMA32);

}

#endif /* !ASSEMBLY */



/*

arch/arm64/include/asm/pgtable-hwdef.h

+1 −2
Original line number Diff line number Diff line
@@ -281,10 +281,9 @@ 
 */

#ifdef CONFIG_ARM64_PA_BITS_52

/*

 * This should be GENMASK_ULL(47, 2).

 * TTBR_ELx[1] is RES0 in this configuration.

 */

#define TTBR_BADDR_MASK_52	(((UL(1) << 46) - 1) << 2)

#define TTBR_BADDR_MASK_52	GENMASK_ULL(47, 2)

#endif



#ifdef CONFIG_ARM64_VA_BITS_52

arch/arm64/include/asm/processor.h

+2 −1
Original line number Diff line number Diff line
@@ -272,8 +272,9 @@ void tls_preserve_current_state(void); 


static inline void start_thread_common(struct pt_regs *regs, unsigned long pc)

{

	s32 previous_syscall = regs->syscallno;

	memset(regs, 0, sizeof(*regs));

	forget_syscall(regs);

	regs->syscallno = previous_syscall;

	regs->pc = pc;



	if (system_uses_irq_prio_masking())