Commit 02a8ae72 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'drm-intel-next-fixes-2023-04-20-1' of... 

Merge tag 'drm-intel-next-fixes-2023-04-20-1' of git://anongit.freedesktop.org/drm/drm-intel

 into drm-next

Active port PLL MST fix for second stream, CSC plane index fix,
null and oob array deref fixes and selftest memory leak fix.

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
From: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/ZEDz9ZedyZVyFXxU@jlahtine-mobl.ger.corp.intel.com
parents e82c98f2 2c696796

drivers/gpu/drm/i915/display/intel_ddi.c

+20 −7
Original line number Diff line number Diff line
@@ -3060,6 +3060,25 @@ void intel_ddi_update_pipe(struct intel_atomic_state *state, 
	intel_hdcp_update_pipe(state, encoder, crtc_state, conn_state);

}



void intel_ddi_update_active_dpll(struct intel_atomic_state *state,

				  struct intel_encoder *encoder,

				  struct intel_crtc *crtc)

{

	struct drm_i915_private *i915 = to_i915(encoder->base.dev);

	struct intel_crtc_state *crtc_state =

		intel_atomic_get_new_crtc_state(state, crtc);

	struct intel_crtc *slave_crtc;

	enum phy phy = intel_port_to_phy(i915, encoder->port);



	if (!intel_phy_is_tc(i915, phy))

		return;



	intel_update_active_dpll(state, crtc, encoder);

	for_each_intel_crtc_in_pipe_mask(&i915->drm, slave_crtc,

					 intel_crtc_bigjoiner_slave_pipes(crtc_state))

		intel_update_active_dpll(state, slave_crtc, encoder);

}



static void

intel_ddi_pre_pll_enable(struct intel_atomic_state *state,

			 struct intel_encoder *encoder,
@@ -3074,15 +3093,9 @@ intel_ddi_pre_pll_enable(struct intel_atomic_state *state, 
	if (is_tc_port) {

		struct intel_crtc *master_crtc =

			to_intel_crtc(crtc_state->uapi.crtc);

		struct intel_crtc *slave_crtc;



		intel_tc_port_get_link(dig_port, crtc_state->lane_count);



		intel_update_active_dpll(state, master_crtc, encoder);



		for_each_intel_crtc_in_pipe_mask(&dev_priv->drm, slave_crtc,

						 intel_crtc_bigjoiner_slave_pipes(crtc_state))

			intel_update_active_dpll(state, slave_crtc, encoder);

		intel_ddi_update_active_dpll(state, encoder, master_crtc);

	}



	main_link_aux_power_domain_get(dig_port, crtc_state);

drivers/gpu/drm/i915/display/intel_ddi.h

+3 −0
Original line number Diff line number Diff line
@@ -72,5 +72,8 @@ void intel_ddi_sanitize_encoder_pll_mapping(struct intel_encoder *encoder); 
int intel_ddi_level(struct intel_encoder *encoder,

		    const struct intel_crtc_state *crtc_state,

		    int lane);

void intel_ddi_update_active_dpll(struct intel_atomic_state *state,

				  struct intel_encoder *encoder,

				  struct intel_crtc *crtc);



#endif /* __INTEL_DDI_H__ */

drivers/gpu/drm/i915/display/intel_display.c

+1 −1
Original line number Diff line number Diff line
@@ -959,7 +959,7 @@ intel_get_crtc_new_encoder(const struct intel_atomic_state *state, 
		num_encoders++;

	}



	drm_WARN(encoder->base.dev, num_encoders != 1,

	drm_WARN(state->base.dev, num_encoders != 1,

		 "%d encoders for pipe %c\n",

		 num_encoders, pipe_name(master_crtc->pipe));

drivers/gpu/drm/i915/display/intel_dp_mst.c

+7 −0
Original line number Diff line number Diff line
@@ -674,6 +674,13 @@ static void intel_mst_pre_pll_enable_dp(struct intel_atomic_state *state, 
	if (intel_dp->active_mst_links == 0)

		dig_port->base.pre_pll_enable(state, &dig_port->base,

						    pipe_config, NULL);

	else

		/*

		 * The port PLL state needs to get updated for secondary

		 * streams as for the primary stream.

		 */

		intel_ddi_update_active_dpll(state, &dig_port->base,

					     to_intel_crtc(pipe_config->uapi.crtc));

}



static void intel_mst_pre_enable_dp(struct intel_atomic_state *state,

drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c

+17 −4
Original line number Diff line number Diff line
@@ -488,12 +488,25 @@ static void __force_fw_fetch_failures(struct intel_uc_fw *uc_fw, int e) 
	}

}



static int check_gsc_manifest(const struct firmware *fw,

static int check_gsc_manifest(struct intel_gt *gt,

			      const struct firmware *fw,

			      struct intel_uc_fw *uc_fw)

{

	u32 *dw = (u32 *)fw->data;

	u32 version_hi = dw[HUC_GSC_VERSION_HI_DW];

	u32 version_lo = dw[HUC_GSC_VERSION_LO_DW];

	u32 version_hi, version_lo;

	size_t min_size;



	/* Check the size of the blob before examining buffer contents */

	min_size = sizeof(u32) * (HUC_GSC_VERSION_LO_DW + 1);

	if (unlikely(fw->size < min_size)) {

		gt_warn(gt, "%s firmware %s: invalid size: %zu < %zu\n",

			intel_uc_fw_type_repr(uc_fw->type), uc_fw->file_selected.path,

			fw->size, min_size);

		return -ENODATA;

	}



	version_hi = dw[HUC_GSC_VERSION_HI_DW];

	version_lo = dw[HUC_GSC_VERSION_LO_DW];



	uc_fw->file_selected.ver.major = FIELD_GET(HUC_GSC_MAJOR_VER_HI_MASK, version_hi);

	uc_fw->file_selected.ver.minor = FIELD_GET(HUC_GSC_MINOR_VER_HI_MASK, version_hi);
@@ -664,7 +677,7 @@ static int check_fw_header(struct intel_gt *gt, 
		return 0;



	if (uc_fw->loaded_via_gsc)

		err = check_gsc_manifest(fw, uc_fw);

		err = check_gsc_manifest(gt, fw, uc_fw);

	else

		err = check_ccs_header(gt, fw, uc_fw);

	if (err)