Commit 026c396b authored by Jiansong Chen's avatar Jiansong Chen Committed by Alex Deucher
Browse files

drm/amdgpu: add ih ip block for navy_flounder 



navy_flounder has the same osssys IP verison with
sienna_cichlid, follow its setting.

Signed-off-by: default avatarJiansong Chen <Jiansong.Chen@amd.com>
Reviewed-by: default avatarTao Zhou <Tao.Zhou1@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent fc8f07da

drivers/gpu/drm/amd/amdgpu/navi10_ih.c

+1 −0
Original line number Diff line number Diff line
@@ -270,6 +270,7 @@ static int navi10_ih_irq_init(struct amdgpu_device *adev) 
		if (ih->use_bus_addr) {

			switch (adev->asic_type) {

			case CHIP_SIENNA_CICHLID:

			case CHIP_NAVY_FLOUNDER:

				ih_chicken = RREG32_SOC15(OSSSYS, 0, mmIH_CHICKEN_Sienna_Cichlid);

				ih_chicken = REG_SET_FIELD(ih_chicken,

						IH_CHICKEN, MC_SPACE_GPA_ENABLE, 1);

drivers/gpu/drm/amd/amdgpu/nv.c

+1 −0
Original line number Diff line number Diff line
@@ -526,6 +526,7 @@ int nv_set_ip_blocks(struct amdgpu_device *adev) 
	case CHIP_NAVY_FLOUNDER:

		amdgpu_device_ip_block_add(adev, &nv_common_ip_block);

		amdgpu_device_ip_block_add(adev, &gmc_v10_0_ip_block);

		amdgpu_device_ip_block_add(adev, &navi10_ih_ip_block);

		break;

	default:

		return -EINVAL;