Commit 023d2f14 authored by Ping-Ke Shih's avatar Ping-Ke Shih Committed by Kalle Valo
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wifi: rtw89: get data rate mode/NSS/MCS v1 from RX descriptor



The data rate from RX descriptor also uses hardware rate v1 for WiFi 7
chips. The rate code contains three parts -- mode, NSS and MCS. For
CCK/OFDM/HT rates, NSS/MCS parts are the same as before. VHT/HE/EHT rates
are changed and listed as below:

     mode    NSS    MCS
V0   [8:7]   [6:4]  [3:0]
V1   [10:8]  [7:5]  [4:0]

Signed-off-by: default avatarPing-Ke Shih <pkshih@realtek.com>
Signed-off-by: default avatarKalle Valo <kvalo@kernel.org>
Link: https://lore.kernel.org/r/20230728070252.66525-11-pkshih@realtek.com
parent ae775faa
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+12 −12
Original line number Diff line number Diff line
@@ -1456,16 +1456,16 @@ static bool rtw89_core_rx_ppdu_match(struct rtw89_dev *rtwdev,
	bool ret;

	data_rate = desc_info->data_rate;
	data_rate_mode = GET_DATA_RATE_MODE(data_rate);
	data_rate_mode = rtw89_get_data_rate_mode(rtwdev, data_rate);
	if (data_rate_mode == DATA_RATE_MODE_NON_HT) {
		rate_idx = GET_DATA_RATE_NOT_HT_IDX(data_rate);
		rate_idx = rtw89_get_data_not_ht_idx(rtwdev, data_rate);
		/* rate_idx is still hardware value here */
	} else if (data_rate_mode == DATA_RATE_MODE_HT) {
		rate_idx = GET_DATA_RATE_HT_IDX(data_rate);
		rate_idx = rtw89_get_data_ht_mcs(rtwdev, data_rate);
	} else if (data_rate_mode == DATA_RATE_MODE_VHT) {
		rate_idx = GET_DATA_RATE_VHT_HE_IDX(data_rate);
		rate_idx = rtw89_get_data_mcs(rtwdev, data_rate);
	} else if (data_rate_mode == DATA_RATE_MODE_HE) {
		rate_idx = GET_DATA_RATE_VHT_HE_IDX(data_rate);
		rate_idx = rtw89_get_data_mcs(rtwdev, data_rate);
	} else {
		rtw89_warn(rtwdev, "invalid RX rate mode %d\n", data_rate_mode);
	}
@@ -1929,26 +1929,26 @@ static void rtw89_core_update_rx_status(struct rtw89_dev *rtwdev,
	rx_status->bw = rtw89_hw_to_rate_info_bw(desc_info->bw);

	data_rate = desc_info->data_rate;
	data_rate_mode = GET_DATA_RATE_MODE(data_rate);
	data_rate_mode = rtw89_get_data_rate_mode(rtwdev, data_rate);
	if (data_rate_mode == DATA_RATE_MODE_NON_HT) {
		rx_status->encoding = RX_ENC_LEGACY;
		rx_status->rate_idx = GET_DATA_RATE_NOT_HT_IDX(data_rate);
		rx_status->rate_idx = rtw89_get_data_not_ht_idx(rtwdev, data_rate);
		/* convert rate_idx after we get the correct band */
	} else if (data_rate_mode == DATA_RATE_MODE_HT) {
		rx_status->encoding = RX_ENC_HT;
		rx_status->rate_idx = GET_DATA_RATE_HT_IDX(data_rate);
		rx_status->rate_idx = rtw89_get_data_ht_mcs(rtwdev, data_rate);
		if (desc_info->gi_ltf)
			rx_status->enc_flags |= RX_ENC_FLAG_SHORT_GI;
	} else if (data_rate_mode == DATA_RATE_MODE_VHT) {
		rx_status->encoding = RX_ENC_VHT;
		rx_status->rate_idx = GET_DATA_RATE_VHT_HE_IDX(data_rate);
		rx_status->nss = GET_DATA_RATE_NSS(data_rate) + 1;
		rx_status->rate_idx = rtw89_get_data_mcs(rtwdev, data_rate);
		rx_status->nss = rtw89_get_data_nss(rtwdev, data_rate) + 1;
		if (desc_info->gi_ltf)
			rx_status->enc_flags |= RX_ENC_FLAG_SHORT_GI;
	} else if (data_rate_mode == DATA_RATE_MODE_HE) {
		rx_status->encoding = RX_ENC_HE;
		rx_status->rate_idx = GET_DATA_RATE_VHT_HE_IDX(data_rate);
		rx_status->nss = GET_DATA_RATE_NSS(data_rate) + 1;
		rx_status->rate_idx = rtw89_get_data_mcs(rtwdev, data_rate);
		rx_status->nss = rtw89_get_data_nss(rtwdev, data_rate) + 1;
	} else {
		rtw89_warn(rtwdev, "invalid RX rate mode %d\n", data_rate_mode);
	}
+1 −1
Original line number Diff line number Diff line
@@ -3014,7 +3014,7 @@ static void rtw89_phy_antdiv_sts_instance_add(struct rtw89_dev *rtwdev,
					      struct rtw89_rx_phy_ppdu *phy_ppdu,
					      struct rtw89_antdiv_stats *stats)
{
	if (GET_DATA_RATE_MODE(phy_ppdu->rate) == DATA_RATE_MODE_NON_HT) {
	if (rtw89_get_data_rate_mode(rtwdev, phy_ppdu->rate) == DATA_RATE_MODE_NON_HT) {
		if (phy_ppdu->rate < RTW89_HW_RATE_OFDM6) {
			ewma_rssi_add(&stats->cck_rssi_avg, phy_ppdu->rssi_avg);
			stats->pkt_cnt_cck++;
+42 −5
Original line number Diff line number Diff line
@@ -8,19 +8,56 @@
#include "debug.h"

#define DATA_RATE_MODE_CTRL_MASK	GENMASK(8, 7)
#define DATA_RATE_MODE_CTRL_MASK_V1	GENMASK(10, 8)
#define DATA_RATE_NOT_HT_IDX_MASK	GENMASK(3, 0)
#define DATA_RATE_MODE_NON_HT		0x0
#define DATA_RATE_HT_IDX_MASK		GENMASK(4, 0)
#define DATA_RATE_HT_IDX_MASK_V1	GENMASK(4, 0)
#define DATA_RATE_MODE_HT		0x1
#define DATA_RATE_VHT_HE_NSS_MASK	GENMASK(6, 4)
#define DATA_RATE_VHT_HE_IDX_MASK	GENMASK(3, 0)
#define DATA_RATE_NSS_MASK_V1		GENMASK(7, 5)
#define DATA_RATE_MCS_MASK_V1		GENMASK(4, 0)
#define DATA_RATE_MODE_VHT		0x2
#define DATA_RATE_MODE_HE		0x3
#define GET_DATA_RATE_MODE(r)		FIELD_GET(DATA_RATE_MODE_CTRL_MASK, r)
#define GET_DATA_RATE_NOT_HT_IDX(r)	FIELD_GET(DATA_RATE_NOT_HT_IDX_MASK, r)
#define GET_DATA_RATE_HT_IDX(r)		FIELD_GET(DATA_RATE_HT_IDX_MASK, r)
#define GET_DATA_RATE_VHT_HE_IDX(r)	FIELD_GET(DATA_RATE_VHT_HE_IDX_MASK, r)
#define GET_DATA_RATE_NSS(r)		FIELD_GET(DATA_RATE_VHT_HE_NSS_MASK, r)
#define DATA_RATE_MODE_EHT		0x4

static inline u8 rtw89_get_data_rate_mode(struct rtw89_dev *rtwdev, u16 hw_rate)
{
	if (rtwdev->chip->chip_gen == RTW89_CHIP_BE)
		return u16_get_bits(hw_rate, DATA_RATE_MODE_CTRL_MASK_V1);

	return u16_get_bits(hw_rate, DATA_RATE_MODE_CTRL_MASK);
}

static inline u8 rtw89_get_data_not_ht_idx(struct rtw89_dev *rtwdev, u16 hw_rate)
{
	return u16_get_bits(hw_rate, DATA_RATE_NOT_HT_IDX_MASK);
}

static inline u8 rtw89_get_data_ht_mcs(struct rtw89_dev *rtwdev, u16 hw_rate)
{
	if (rtwdev->chip->chip_gen == RTW89_CHIP_BE)
		return u16_get_bits(hw_rate, DATA_RATE_HT_IDX_MASK_V1);

	return u16_get_bits(hw_rate, DATA_RATE_HT_IDX_MASK);
}

static inline u8 rtw89_get_data_mcs(struct rtw89_dev *rtwdev, u16 hw_rate)
{
	if (rtwdev->chip->chip_gen == RTW89_CHIP_BE)
		return u16_get_bits(hw_rate, DATA_RATE_MCS_MASK_V1);

	return u16_get_bits(hw_rate, DATA_RATE_VHT_HE_IDX_MASK);
}

static inline u8 rtw89_get_data_nss(struct rtw89_dev *rtwdev, u16 hw_rate)
{
	if (rtwdev->chip->chip_gen == RTW89_CHIP_BE)
		return u16_get_bits(hw_rate, DATA_RATE_NSS_MASK_V1);

	return u16_get_bits(hw_rate, DATA_RATE_VHT_HE_NSS_MASK);
}

/* TX WD BODY DWORD 0 */
#define RTW89_TXWD_BODY0_WP_OFFSET GENMASK(31, 24)