Unverified Commit 022e5220 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'at91-soc-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/soc 

AT91 & POLARFIRE SoC #1 for 5.18:

- sama7g5: CPU idle support with CPUFreq operating points defined in DT
- polarfire: addition of the soc system controller

* tag 'at91-soc-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
  soc: add microchip polarfire soc system controller
  ARM: at91: Kconfig: select PM_OPP
  ARM: at91: PM: add cpu idle support for sama7g5
  ARM: at91: ddr: fix typo to align with datasheet naming
  ARM: at91: ddr: align macro definitions
  ARM: at91: ddr: remove CONFIG_SOC_SAMA7 dependency

Link: https://lore.kernel.org/r/20220225121943.71494-1-nicolas.ferre@microchip.com


Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 16018c0d d0054a47

arch/arm/mach-at91/Kconfig

+1 −0
Original line number Diff line number Diff line
@@ -63,6 +63,7 @@ config SOC_SAMA7G5 
	select HAVE_AT91_GENERATED_CLK

	select HAVE_AT91_SAM9X60_PLL

	select HAVE_AT91_UTMI

	select PM_OPP

	select SOC_SAMA7

	help

	  Select this if you are using one of Microchip's SAMA7G5 family SoC.

arch/arm/mach-at91/pm.c

+26 −1
Original line number Diff line number Diff line
@@ -605,6 +605,30 @@ static void at91sam9_sdram_standby(void) 
		at91_ramc_write(1, AT91_SDRAMC_LPR, saved_lpr1);

}



static void sama7g5_standby(void)

{

	int pwrtmg, ratio;



	pwrtmg = readl(soc_pm.data.ramc[0] + UDDRC_PWRCTL);

	ratio = readl(soc_pm.data.pmc + AT91_PMC_RATIO);



	/*

	 * Place RAM into self-refresh after a maximum idle clocks. The maximum

	 * idle clocks is configured by bootloader in

	 * UDDRC_PWRMGT.SELFREF_TO_X32.

	 */

	writel(pwrtmg | UDDRC_PWRCTL_SELFREF_EN,

	       soc_pm.data.ramc[0] + UDDRC_PWRCTL);

	/* Divide CPU clock by 16. */

	writel(ratio & ~AT91_PMC_RATIO_RATIO, soc_pm.data.pmc + AT91_PMC_RATIO);



	cpu_do_idle();



	/* Restore previous configuration. */

	writel(ratio, soc_pm.data.pmc + AT91_PMC_RATIO);

	writel(pwrtmg, soc_pm.data.ramc[0] + UDDRC_PWRCTL);

}



struct ramc_info {

	void (*idle)(void);

	unsigned int memctrl;
@@ -615,6 +639,7 @@ static const struct ramc_info ramc_infos[] __initconst = { 
	{ .idle = at91sam9_sdram_standby, .memctrl = AT91_MEMCTRL_SDRAMC},

	{ .idle = at91_ddr_standby, .memctrl = AT91_MEMCTRL_DDRSDR},

	{ .idle = sama5d3_ddr_standby, .memctrl = AT91_MEMCTRL_DDRSDR},

	{ .idle = sama7g5_standby, },

};



static const struct of_device_id ramc_ids[] __initconst = {
@@ -622,7 +647,7 @@ static const struct of_device_id ramc_ids[] __initconst = { 
	{ .compatible = "atmel,at91sam9260-sdramc", .data = &ramc_infos[1] },

	{ .compatible = "atmel,at91sam9g45-ddramc", .data = &ramc_infos[2] },

	{ .compatible = "atmel,sama5d3-ddramc", .data = &ramc_infos[3] },

	{ .compatible = "microchip,sama7g5-uddrc", },

	{ .compatible = "microchip,sama7g5-uddrc", .data = &ramc_infos[4], },

	{ /*sentinel*/ }

};

arch/arm/mach-at91/pm_suspend.S

+2 −2
Original line number Diff line number Diff line
@@ -159,7 +159,7 @@ sr_ena_1: 


	/* Switch to self-refresh. */

	ldr	tmp1, [r2, #UDDRC_PWRCTL]

	orr	tmp1, tmp1, #UDDRC_PWRCTRL_SELFREF_SW

	orr	tmp1, tmp1, #UDDRC_PWRCTL_SELFREF_SW

	str	tmp1, [r2, #UDDRC_PWRCTL]



sr_ena_2:
@@ -276,7 +276,7 @@ sr_dis_5: 


	/* Trigger self-refresh exit. */

	ldr	tmp1, [r2, #UDDRC_PWRCTL]

	bic	tmp1, tmp1, #UDDRC_PWRCTRL_SELFREF_SW

	bic	tmp1, tmp1, #UDDRC_PWRCTL_SELFREF_SW

	str	tmp1, [r2, #UDDRC_PWRCTL]



sr_dis_6:

drivers/soc/Kconfig

+1 −0
Original line number Diff line number Diff line
@@ -13,6 +13,7 @@ source "drivers/soc/imx/Kconfig" 
source "drivers/soc/ixp4xx/Kconfig"

source "drivers/soc/litex/Kconfig"

source "drivers/soc/mediatek/Kconfig"

source "drivers/soc/microchip/Kconfig"

source "drivers/soc/qcom/Kconfig"

source "drivers/soc/renesas/Kconfig"

source "drivers/soc/rockchip/Kconfig"

drivers/soc/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -18,6 +18,7 @@ obj-y += ixp4xx/ 
obj-$(CONFIG_SOC_XWAY)		+= lantiq/

obj-$(CONFIG_LITEX_SOC_CONTROLLER) += litex/

obj-y				+= mediatek/

obj-y				+= microchip/

obj-y				+= amlogic/

obj-y				+= qcom/

obj-y				+= renesas/