Unverified Commit 020a3947 authored by Joy Chakraborty's avatar Joy Chakraborty Committed by Mark Brown
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spi: dw: Add DMA address widths capability check 



Store address width capabilities of DMA controller during init and check
the same per transfer to make sure the bits/word requirement can be met.

Current DW DMA driver requires both tx and rx channel to be configured
and functional hence a subset of both tx and rx channel address width
capability is checked with the width requirement(n_bytes) for a
transfer.

* tested on Baikal-T1 based system with DW SPI-looped back interface
transferring a chunk of data with DFS:8,12,16.

Signed-off-by: default avatarJoy Chakraborty <joychakr@google.com>
Reviewed-by: default avatarSerge Semin <fancer.lancer@gmail.com>
Tested-by: default avatarSerge Semin <fancer.lancer@gmail.com>
Link: https://lore.kernel.org/r/20230512104746.1797865-3-joychakr@google.com


Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent d1ca1c52

drivers/spi/spi-dw-dma.c

+14 −1
Original line number Diff line number Diff line
@@ -98,6 +98,13 @@ static int dw_spi_dma_caps_init(struct dw_spi *dws) 
	else

		dws->dma_sg_burst = 0;



	/*

	 * Assuming both channels belong to the same DMA controller hence the

	 * peripheral side address width capabilities most likely would be

	 * the same.

	 */

	dws->dma_addr_widths = tx.dst_addr_widths & rx.src_addr_widths;



	return 0;

}
@@ -239,8 +246,14 @@ static bool dw_spi_can_dma(struct spi_controller *master, 
			   struct spi_device *spi, struct spi_transfer *xfer)

{

	struct dw_spi *dws = spi_controller_get_devdata(master);

	enum dma_slave_buswidth dma_bus_width;



	if (xfer->len <= dws->fifo_len)

		return false;



	dma_bus_width = dw_spi_dma_convert_width(dws->n_bytes);



	return xfer->len > dws->fifo_len;

	return dws->dma_addr_widths & BIT(dma_bus_width);

}



static int dw_spi_dma_wait(struct dw_spi *dws, unsigned int len, u32 speed)

drivers/spi/spi-dw.h

+1 −0
Original line number Diff line number Diff line
@@ -190,6 +190,7 @@ struct dw_spi { 
	struct dma_chan		*rxchan;

	u32			rxburst;

	u32			dma_sg_burst;

	u32			dma_addr_widths;

	unsigned long		dma_chan_busy;

	dma_addr_t		dma_addr; /* phy address of the Data register */

	const struct dw_spi_dma_ops *dma_ops;