Commit 01e2d36d authored by Rob Herring's avatar Rob Herring Committed by Zeng Heng
Browse files

cacheinfo: Allow for >32-bit cache 'id' 

maillist inclusion
category: feature
bugzilla: https://gitee.com/openeuler/kernel/issues/I8T2RT

Reference: https://git.kernel.org/pub/scm/linux/kernel/git/morse/linux.git/log/?h=mpam/snapshot/v6.7-rc2



---------------------------

In preparation to set the cache 'id' based on the CPU h/w ids, allow for
64-bit bit 'id' value. The only case that needs this is arm64, so
unsigned long is sufficient.

Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: "Rafael J. Wysocki" <rafael@kernel.org>
Signed-off-by: default avatarRob Herring <robh@kernel.org>
[ Update get_cpu_cacheinfo_id() too. Use UL instead of ULL. ]
Signed-off-by: default avatarJames Morse <james.morse@arm.com>
Signed-off-by: default avatarZeng Heng <zengheng4@huawei.com>
parent 1ca44611

drivers/base/cacheinfo.c

+7 −1
Original line number Diff line number Diff line
@@ -620,13 +620,19 @@ static ssize_t file_name##_show(struct device *dev, \ 
	return sysfs_emit(buf, "%u\n", this_leaf->object);	\

}



show_one(id, id);

show_one(level, level);

show_one(coherency_line_size, coherency_line_size);

show_one(number_of_sets, number_of_sets);

show_one(physical_line_partition, physical_line_partition);

show_one(ways_of_associativity, ways_of_associativity);



static ssize_t id_show(struct device *dev, struct device_attribute *attr, char *buf)

{

	struct cacheinfo *this_leaf = dev_get_drvdata(dev);



	return sysfs_emit(buf, "%lu\n", this_leaf->id);

}



static ssize_t size_show(struct device *dev,

			 struct device_attribute *attr, char *buf)

{

include/linux/cacheinfo.h

+4 −4
Original line number Diff line number Diff line
@@ -47,7 +47,7 @@ extern unsigned int coherency_max_size; 
 * keeping, the remaining members form the core properties of the cache

 */

struct cacheinfo {

	unsigned int id;

	unsigned long id;

	enum cache_type type;

	unsigned int level;

	unsigned int coherency_line_size;
@@ -116,7 +116,7 @@ const struct attribute_group *cache_get_priv_group(struct cacheinfo *this_leaf); 
 * Get the id of the cache associated with @cpu at level @level.

 * cpuhp lock must be held.

 */

static inline int get_cpu_cacheinfo_id(int cpu, int level)

static inline unsigned long get_cpu_cacheinfo_id(int cpu, int level)

{

	struct cpu_cacheinfo *ci = get_cpu_cacheinfo(cpu);

	int i;
@@ -125,11 +125,11 @@ static inline int get_cpu_cacheinfo_id(int cpu, int level) 
		if (ci->info_list[i].level == level) {

			if (ci->info_list[i].attributes & CACHE_ID)

				return ci->info_list[i].id;

			return -1;

			return ~0UL;

		}

	}



	return -1;

	return ~0UL;

}



#ifdef CONFIG_ARM64