Commit 01d6ea31 authored by Dmitry Osipenko's avatar Dmitry Osipenko Committed by Greg Kroah-Hartman
Browse files

usb: phy: tegra: Use u32 for hardware register variables



There is a mix of u32/ULONG usage in the driver's code. Let's switch to
u32 uniformly, for consistency.

Suggested-by: default avatarThierry Reding <thierry.reding@gmail.com>
Signed-off-by: default avatarDmitry Osipenko <digetx@gmail.com>
Link: https://lore.kernel.org/r/20200106013416.9604-13-digetx@gmail.com


Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 87541747
Loading
Loading
Loading
Loading
+15 −13
Original line number Original line Diff line number Diff line
@@ -204,7 +204,7 @@ static inline struct tegra_usb_phy *to_tegra_usb_phy(struct usb_phy *u_phy)
static void set_pts(struct tegra_usb_phy *phy, u8 pts_val)
static void set_pts(struct tegra_usb_phy *phy, u8 pts_val)
{
{
	void __iomem *base = phy->regs;
	void __iomem *base = phy->regs;
	unsigned long val;
	u32 val;


	if (phy->soc_config->has_hostpc) {
	if (phy->soc_config->has_hostpc) {
		val = readl_relaxed(base + TEGRA_USB_HOSTPC1_DEVLC);
		val = readl_relaxed(base + TEGRA_USB_HOSTPC1_DEVLC);
@@ -223,7 +223,7 @@ static void set_pts(struct tegra_usb_phy *phy, u8 pts_val)
static void set_phcd(struct tegra_usb_phy *phy, bool enable)
static void set_phcd(struct tegra_usb_phy *phy, bool enable)
{
{
	void __iomem *base = phy->regs;
	void __iomem *base = phy->regs;
	unsigned long val;
	u32 val;


	if (phy->soc_config->has_hostpc) {
	if (phy->soc_config->has_hostpc) {
		val = readl_relaxed(base + TEGRA_USB_HOSTPC1_DEVLC);
		val = readl_relaxed(base + TEGRA_USB_HOSTPC1_DEVLC);
@@ -310,7 +310,8 @@ static int utmip_pad_power_on(struct tegra_usb_phy *phy)
{
{
	struct tegra_utmip_config *config = phy->config;
	struct tegra_utmip_config *config = phy->config;
	void __iomem *base = phy->pad_regs;
	void __iomem *base = phy->pad_regs;
	unsigned long val, flags;
	unsigned long flags;
	u32 val;
	int err;
	int err;


	err = clk_prepare_enable(phy->pad_clk);
	err = clk_prepare_enable(phy->pad_clk);
@@ -345,7 +346,8 @@ static int utmip_pad_power_on(struct tegra_usb_phy *phy)
static int utmip_pad_power_off(struct tegra_usb_phy *phy)
static int utmip_pad_power_off(struct tegra_usb_phy *phy)
{
{
	void __iomem *base = phy->pad_regs;
	void __iomem *base = phy->pad_regs;
	unsigned long val, flags;
	unsigned long flags;
	u32 val;
	int err;
	int err;


	if (!utmip_pad_count) {
	if (!utmip_pad_count) {
@@ -383,7 +385,7 @@ static int utmi_wait_register(void __iomem *reg, u32 mask, u32 result)
static void utmi_phy_clk_disable(struct tegra_usb_phy *phy)
static void utmi_phy_clk_disable(struct tegra_usb_phy *phy)
{
{
	void __iomem *base = phy->regs;
	void __iomem *base = phy->regs;
	unsigned long val;
	u32 val;


	/*
	/*
	 * The USB driver may have already initiated the phy clock
	 * The USB driver may have already initiated the phy clock
@@ -415,7 +417,7 @@ static void utmi_phy_clk_disable(struct tegra_usb_phy *phy)
static void utmi_phy_clk_enable(struct tegra_usb_phy *phy)
static void utmi_phy_clk_enable(struct tegra_usb_phy *phy)
{
{
	void __iomem *base = phy->regs;
	void __iomem *base = phy->regs;
	unsigned long val;
	u32 val;


	/*
	/*
	 * The USB driver may have already initiated the phy clock
	 * The USB driver may have already initiated the phy clock
@@ -450,7 +452,7 @@ static int utmi_phy_power_on(struct tegra_usb_phy *phy)
{
{
	struct tegra_utmip_config *config = phy->config;
	struct tegra_utmip_config *config = phy->config;
	void __iomem *base = phy->regs;
	void __iomem *base = phy->regs;
	unsigned long val;
	u32 val;
	int err;
	int err;


	val = readl_relaxed(base + USB_SUSP_CTRL);
	val = readl_relaxed(base + USB_SUSP_CTRL);
@@ -601,7 +603,7 @@ static int utmi_phy_power_on(struct tegra_usb_phy *phy)
static int utmi_phy_power_off(struct tegra_usb_phy *phy)
static int utmi_phy_power_off(struct tegra_usb_phy *phy)
{
{
	void __iomem *base = phy->regs;
	void __iomem *base = phy->regs;
	unsigned long val;
	u32 val;


	utmi_phy_clk_disable(phy);
	utmi_phy_clk_disable(phy);


@@ -636,7 +638,7 @@ static int utmi_phy_power_off(struct tegra_usb_phy *phy)
static void utmi_phy_preresume(struct tegra_usb_phy *phy)
static void utmi_phy_preresume(struct tegra_usb_phy *phy)
{
{
	void __iomem *base = phy->regs;
	void __iomem *base = phy->regs;
	unsigned long val;
	u32 val;


	val = readl_relaxed(base + UTMIP_TX_CFG0);
	val = readl_relaxed(base + UTMIP_TX_CFG0);
	val |= UTMIP_HS_DISCON_DISABLE;
	val |= UTMIP_HS_DISCON_DISABLE;
@@ -646,7 +648,7 @@ static void utmi_phy_preresume(struct tegra_usb_phy *phy)
static void utmi_phy_postresume(struct tegra_usb_phy *phy)
static void utmi_phy_postresume(struct tegra_usb_phy *phy)
{
{
	void __iomem *base = phy->regs;
	void __iomem *base = phy->regs;
	unsigned long val;
	u32 val;


	val = readl_relaxed(base + UTMIP_TX_CFG0);
	val = readl_relaxed(base + UTMIP_TX_CFG0);
	val &= ~UTMIP_HS_DISCON_DISABLE;
	val &= ~UTMIP_HS_DISCON_DISABLE;
@@ -657,7 +659,7 @@ static void utmi_phy_restore_start(struct tegra_usb_phy *phy,
				   enum tegra_usb_phy_port_speed port_speed)
				   enum tegra_usb_phy_port_speed port_speed)
{
{
	void __iomem *base = phy->regs;
	void __iomem *base = phy->regs;
	unsigned long val;
	u32 val;


	val = readl_relaxed(base + UTMIP_MISC_CFG0);
	val = readl_relaxed(base + UTMIP_MISC_CFG0);
	val &= ~UTMIP_DPDM_OBSERVE_SEL(~0);
	val &= ~UTMIP_DPDM_OBSERVE_SEL(~0);
@@ -677,7 +679,7 @@ static void utmi_phy_restore_start(struct tegra_usb_phy *phy,
static void utmi_phy_restore_end(struct tegra_usb_phy *phy)
static void utmi_phy_restore_end(struct tegra_usb_phy *phy)
{
{
	void __iomem *base = phy->regs;
	void __iomem *base = phy->regs;
	unsigned long val;
	u32 val;


	val = readl_relaxed(base + UTMIP_MISC_CFG0);
	val = readl_relaxed(base + UTMIP_MISC_CFG0);
	val &= ~UTMIP_DPDM_OBSERVE;
	val &= ~UTMIP_DPDM_OBSERVE;
@@ -688,7 +690,7 @@ static void utmi_phy_restore_end(struct tegra_usb_phy *phy)
static int ulpi_phy_power_on(struct tegra_usb_phy *phy)
static int ulpi_phy_power_on(struct tegra_usb_phy *phy)
{
{
	void __iomem *base = phy->regs;
	void __iomem *base = phy->regs;
	unsigned long val;
	u32 val;
	int err;
	int err;


	err = gpio_direction_output(phy->reset_gpio, 0);
	err = gpio_direction_output(phy->reset_gpio, 0);