Unverified Commit 01b17067 authored by Mark Brown's avatar Mark Brown
Browse files

ASoC: mchp-spdifrx: add runtime PM support and fixes 

Merge series from Claudiu Beznea <claudiu.beznea@microchip.com>:

This series adds runtime PM support for Microchip SPDIFRX driver.
Along with it I added few fixes identified while going though the code
and playing with Microchip SPDIFRX controller.
parents 41e0207f 514d7f9d

sound/soc/atmel/mchp-spdifrx.c

+403 −149
Original line number Diff line number Diff line
@@ -9,6 +9,7 @@ 
#include <linux/clk.h>

#include <linux/io.h>

#include <linux/module.h>

#include <linux/pm_runtime.h>

#include <linux/regmap.h>

#include <linux/spinlock.h>
@@ -192,6 +193,43 @@ static bool mchp_spdifrx_precious_reg(struct device *dev, unsigned int reg) 
	}

}



static bool mchp_spdifrx_volatile_reg(struct device *dev, unsigned int reg)

{

	switch (reg) {

	case SPDIFRX_IMR:

	case SPDIFRX_ISR:

	case SPDIFRX_RSR:

	case SPDIFRX_CHSR(0, 0):

	case SPDIFRX_CHSR(0, 1):

	case SPDIFRX_CHSR(0, 2):

	case SPDIFRX_CHSR(0, 3):

	case SPDIFRX_CHSR(0, 4):

	case SPDIFRX_CHSR(0, 5):

	case SPDIFRX_CHUD(0, 0):

	case SPDIFRX_CHUD(0, 1):

	case SPDIFRX_CHUD(0, 2):

	case SPDIFRX_CHUD(0, 3):

	case SPDIFRX_CHUD(0, 4):

	case SPDIFRX_CHUD(0, 5):

	case SPDIFRX_CHSR(1, 0):

	case SPDIFRX_CHSR(1, 1):

	case SPDIFRX_CHSR(1, 2):

	case SPDIFRX_CHSR(1, 3):

	case SPDIFRX_CHSR(1, 4):

	case SPDIFRX_CHSR(1, 5):

	case SPDIFRX_CHUD(1, 0):

	case SPDIFRX_CHUD(1, 1):

	case SPDIFRX_CHUD(1, 2):

	case SPDIFRX_CHUD(1, 3):

	case SPDIFRX_CHUD(1, 4):

	case SPDIFRX_CHUD(1, 5):

	case SPDIFRX_VERSION:

		return true;

	default:

		return false;

	}

}



static const struct regmap_config mchp_spdifrx_regmap_config = {

	.reg_bits = 32,

	.reg_stride = 4,
@@ -200,6 +238,8 @@ static const struct regmap_config mchp_spdifrx_regmap_config = { 
	.readable_reg = mchp_spdifrx_readable_reg,

	.writeable_reg = mchp_spdifrx_writeable_reg,

	.precious_reg = mchp_spdifrx_precious_reg,

	.volatile_reg = mchp_spdifrx_volatile_reg,

	.cache_type = REGCACHE_FLAT,

};



#define SPDIFRX_GCLK_RATIO_MIN	(12 * 64)
@@ -209,17 +249,34 @@ static const struct regmap_config mchp_spdifrx_regmap_config = { 


#define SPDIFRX_CHANNELS	2



/**

 * struct mchp_spdifrx_ch_stat: MCHP SPDIFRX channel status

 * @data: channel status bits

 * @done: completion to signal channel status bits acquisition done

 */

struct mchp_spdifrx_ch_stat {

	unsigned char data[SPDIFRX_CS_BITS / 8];

	struct completion done;

};



/**

 * struct mchp_spdifrx_user_data: MCHP SPDIFRX user data

 * @data: user data bits

 * @done: completion to signal user data bits acquisition done

 */

struct mchp_spdifrx_user_data {

	unsigned char data[SPDIFRX_UD_BITS / 8];

	struct completion done;

	spinlock_t lock;	/* protect access to user data */

};



/**

 * struct mchp_spdifrx_mixer_control: MCHP SPDIFRX mixer control data structure

 * @ch_stat: array of channel statuses

 * @user_data: array of user data

 * @ulock: ulock bit status

 * @badf: badf bit status

 * @signal: signal bit status

 */

struct mchp_spdifrx_mixer_control {

	struct mchp_spdifrx_ch_stat ch_stat[SPDIFRX_CHANNELS];

	struct mchp_spdifrx_user_data user_data[SPDIFRX_CHANNELS];
@@ -228,17 +285,26 @@ struct mchp_spdifrx_mixer_control { 
	bool signal;

};



/**

 * struct mchp_spdifrx_dev: MCHP SPDIFRX device data structure

 * @capture: DAI DMA configuration data

 * @control: mixer controls

 * @mlock: mutex to protect concurency b/w configuration and control APIs

 * @dev: struct device

 * @regmap: regmap for this device

 * @pclk: peripheral clock

 * @gclk: generic clock

 * @trigger_enabled: true if enabled though trigger() ops

 */

struct mchp_spdifrx_dev {

	struct snd_dmaengine_dai_dma_data	capture;

	struct mchp_spdifrx_mixer_control	control;

	spinlock_t				blockend_lock;	/* protect access to blockend_refcount */

	int					blockend_refcount;

	struct mutex				mlock;

	struct device				*dev;

	struct regmap				*regmap;

	struct clk				*pclk;

	struct clk				*gclk;

	unsigned int				fmt;

	unsigned int				gclk_enabled:1;

	unsigned int				trigger_enabled;

};



static void mchp_spdifrx_channel_status_read(struct mchp_spdifrx_dev *dev,
@@ -275,37 +341,11 @@ static void mchp_spdifrx_channel_user_data_read(struct mchp_spdifrx_dev *dev, 
	}

}



/* called from non-atomic context only */

static void mchp_spdifrx_isr_blockend_en(struct mchp_spdifrx_dev *dev)

{

	unsigned long flags;



	spin_lock_irqsave(&dev->blockend_lock, flags);

	dev->blockend_refcount++;

	/* don't enable BLOCKEND interrupt if it's already enabled */

	if (dev->blockend_refcount == 1)

		regmap_write(dev->regmap, SPDIFRX_IER, SPDIFRX_IR_BLOCKEND);

	spin_unlock_irqrestore(&dev->blockend_lock, flags);

}



/* called from atomic/non-atomic context */

static void mchp_spdifrx_isr_blockend_dis(struct mchp_spdifrx_dev *dev)

{

	unsigned long flags;



	spin_lock_irqsave(&dev->blockend_lock, flags);

	dev->blockend_refcount--;

	/* don't enable BLOCKEND interrupt if it's already enabled */

	if (dev->blockend_refcount == 0)

		regmap_write(dev->regmap, SPDIFRX_IDR, SPDIFRX_IR_BLOCKEND);

	spin_unlock_irqrestore(&dev->blockend_lock, flags);

}



static irqreturn_t mchp_spdif_interrupt(int irq, void *dev_id)

{

	struct mchp_spdifrx_dev *dev = dev_id;

	struct mchp_spdifrx_mixer_control *ctrl = &dev->control;

	u32 sr, imr, pending, idr = 0;

	u32 sr, imr, pending;

	irqreturn_t ret = IRQ_NONE;

	int ch;
@@ -320,13 +360,10 @@ static irqreturn_t mchp_spdif_interrupt(int irq, void *dev_id) 


	if (pending & SPDIFRX_IR_BLOCKEND) {

		for (ch = 0; ch < SPDIFRX_CHANNELS; ch++) {

			spin_lock(&ctrl->user_data[ch].lock);

			mchp_spdifrx_channel_user_data_read(dev, ch);

			spin_unlock(&ctrl->user_data[ch].lock);



			complete(&ctrl->user_data[ch].done);

		}

		mchp_spdifrx_isr_blockend_dis(dev);

		regmap_write(dev->regmap, SPDIFRX_IDR, SPDIFRX_IR_BLOCKEND);

		ret = IRQ_HANDLED;

	}
@@ -334,7 +371,7 @@ static irqreturn_t mchp_spdif_interrupt(int irq, void *dev_id) 
		if (pending & SPDIFRX_IR_CSC(ch)) {

			mchp_spdifrx_channel_status_read(dev, ch);

			complete(&ctrl->ch_stat[ch].done);

			idr |= SPDIFRX_IR_CSC(ch);

			regmap_write(dev->regmap, SPDIFRX_IDR, SPDIFRX_IR_CSC(ch));

			ret = IRQ_HANDLED;

		}

	}
@@ -344,8 +381,6 @@ static irqreturn_t mchp_spdif_interrupt(int irq, void *dev_id) 
		ret = IRQ_HANDLED;

	}



	regmap_write(dev->regmap, SPDIFRX_IDR, idr);



	return ret;

}
@@ -353,49 +388,42 @@ static int mchp_spdifrx_trigger(struct snd_pcm_substream *substream, int cmd, 
				struct snd_soc_dai *dai)

{

	struct mchp_spdifrx_dev *dev = snd_soc_dai_get_drvdata(dai);

	u32 mr;

	int running;

	int ret;



	regmap_read(dev->regmap, SPDIFRX_MR, &mr);

	running = !!(mr & SPDIFRX_MR_RXEN_ENABLE);

	int ret = 0;



	switch (cmd) {

	case SNDRV_PCM_TRIGGER_START:

	case SNDRV_PCM_TRIGGER_RESUME:

	case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:

		if (!running) {

			mr &= ~SPDIFRX_MR_RXEN_MASK;

			mr |= SPDIFRX_MR_RXEN_ENABLE;

			/* enable overrun interrupts */

			regmap_write(dev->regmap, SPDIFRX_IER,

				     SPDIFRX_IR_OVERRUN);

		}

		mutex_lock(&dev->mlock);

		/* Enable overrun interrupts */

		regmap_write(dev->regmap, SPDIFRX_IER, SPDIFRX_IR_OVERRUN);



		/* Enable receiver. */

		regmap_update_bits(dev->regmap, SPDIFRX_MR, SPDIFRX_MR_RXEN_MASK,

				   SPDIFRX_MR_RXEN_ENABLE);

		dev->trigger_enabled = true;

		mutex_unlock(&dev->mlock);

		break;

	case SNDRV_PCM_TRIGGER_STOP:

	case SNDRV_PCM_TRIGGER_SUSPEND:

	case SNDRV_PCM_TRIGGER_PAUSE_PUSH:

		if (running) {

			mr &= ~SPDIFRX_MR_RXEN_MASK;

			mr |= SPDIFRX_MR_RXEN_DISABLE;

			/* disable overrun interrupts */

			regmap_write(dev->regmap, SPDIFRX_IDR,

				     SPDIFRX_IR_OVERRUN);

		}

		mutex_lock(&dev->mlock);

		/* Disable overrun interrupts */

		regmap_write(dev->regmap, SPDIFRX_IDR, SPDIFRX_IR_OVERRUN);



		/* Disable receiver. */

		regmap_update_bits(dev->regmap, SPDIFRX_MR, SPDIFRX_MR_RXEN_MASK,

				   SPDIFRX_MR_RXEN_DISABLE);

		dev->trigger_enabled = false;

		mutex_unlock(&dev->mlock);

		break;

	default:

		return -EINVAL;

		ret = -EINVAL;

	}



	ret = regmap_write(dev->regmap, SPDIFRX_MR, mr);

	if (ret) {

		dev_err(dev->dev, "unable to enable/disable RX: %d\n", ret);

	return ret;

}



	return 0;

}



static int mchp_spdifrx_hw_params(struct snd_pcm_substream *substream,

				  struct snd_pcm_hw_params *params,

				  struct snd_soc_dai *dai)
@@ -413,13 +441,6 @@ static int mchp_spdifrx_hw_params(struct snd_pcm_substream *substream, 
		return -EINVAL;

	}



	regmap_read(dev->regmap, SPDIFRX_MR, &mr);



	if (mr & SPDIFRX_MR_RXEN_ENABLE) {

		dev_err(dev->dev, "PCM already running\n");

		return -EBUSY;

	}



	if (params_channels(params) != SPDIFRX_CHANNELS) {

		dev_err(dev->dev, "unsupported number of channels: %d\n",

			params_channels(params));
@@ -445,47 +466,46 @@ static int mchp_spdifrx_hw_params(struct snd_pcm_substream *substream, 
		return -EINVAL;

	}



	if (dev->gclk_enabled) {

		clk_disable_unprepare(dev->gclk);

		dev->gclk_enabled = 0;

	mutex_lock(&dev->mlock);

	if (dev->trigger_enabled) {

		dev_err(dev->dev, "PCM already running\n");

		ret = -EBUSY;

		goto unlock;

	}



	/* GCLK is enabled by runtime PM. */

	clk_disable_unprepare(dev->gclk);



	ret = clk_set_min_rate(dev->gclk, params_rate(params) *

					  SPDIFRX_GCLK_RATIO_MIN + 1);

	if (ret) {

		dev_err(dev->dev,

			"unable to set gclk min rate: rate %u * ratio %u + 1\n",

			params_rate(params), SPDIFRX_GCLK_RATIO_MIN);

		return ret;

		/* Restore runtime PM state. */

		clk_prepare_enable(dev->gclk);

		goto unlock;

	}

	ret = clk_prepare_enable(dev->gclk);

	if (ret) {

		dev_err(dev->dev, "unable to enable gclk: %d\n", ret);

		return ret;

		goto unlock;

	}

	dev->gclk_enabled = 1;



	dev_dbg(dev->dev, "GCLK range min set to %d\n",

		params_rate(params) * SPDIFRX_GCLK_RATIO_MIN + 1);



	return regmap_write(dev->regmap, SPDIFRX_MR, mr);

}

	ret = regmap_write(dev->regmap, SPDIFRX_MR, mr);



static int mchp_spdifrx_hw_free(struct snd_pcm_substream *substream,

				struct snd_soc_dai *dai)

{

	struct mchp_spdifrx_dev *dev = snd_soc_dai_get_drvdata(dai);

unlock:

	mutex_unlock(&dev->mlock);



	if (dev->gclk_enabled) {

		clk_disable_unprepare(dev->gclk);

		dev->gclk_enabled = 0;

	}

	return 0;

	return ret;

}



static const struct snd_soc_dai_ops mchp_spdifrx_dai_ops = {

	.trigger	= mchp_spdifrx_trigger,

	.hw_params	= mchp_spdifrx_hw_params,

	.hw_free	= mchp_spdifrx_hw_free,

};



#define MCHP_SPDIF_RATES	SNDRV_PCM_RATE_8000_192000
@@ -515,22 +535,58 @@ static int mchp_spdifrx_cs_get(struct mchp_spdifrx_dev *dev, 
{

	struct mchp_spdifrx_mixer_control *ctrl = &dev->control;

	struct mchp_spdifrx_ch_stat *ch_stat = &ctrl->ch_stat[channel];

	int ret;

	int ret = 0;



	mutex_lock(&dev->mlock);



	ret = pm_runtime_resume_and_get(dev->dev);

	if (ret < 0)

		goto unlock;



	/*

	 * We may reach this point with both clocks enabled but the receiver

	 * still disabled. To void waiting for completion and return with

	 * timeout check the dev->trigger_enabled.

	 *

	 * To retrieve data:

	 * - if the receiver is enabled CSC IRQ will update the data in software

	 *   caches (ch_stat->data)

	 * - otherwise we just update it here the software caches with latest

	 *   available information and return it; in this case we don't need

	 *   spin locking as the IRQ is disabled and will not be raised from

	 *   anywhere else.

	 */



	if (dev->trigger_enabled) {

		reinit_completion(&ch_stat->done);

		regmap_write(dev->regmap, SPDIFRX_IER, SPDIFRX_IR_CSC(channel));

	/* check for new data available */

		/* Check for new data available */

		ret = wait_for_completion_interruptible_timeout(&ch_stat->done,

								msecs_to_jiffies(100));

	/* IP might not be started or valid stream might not be present */

	if (ret < 0) {

		/* Valid stream might not be present */

		if (ret <= 0) {

			dev_dbg(dev->dev, "channel status for channel %d timeout\n",

				channel);

			regmap_write(dev->regmap, SPDIFRX_IDR, SPDIFRX_IR_CSC(channel));

			ret = ret ? : -ETIMEDOUT;

			goto pm_runtime_put;

		} else {

			ret = 0;

		}

	} else {

		/* Update software cache with latest channel status. */

		mchp_spdifrx_channel_status_read(dev, channel);

	}



	memcpy(uvalue->value.iec958.status, ch_stat->data,

	       sizeof(ch_stat->data));



	return 0;

pm_runtime_put:

	pm_runtime_mark_last_busy(dev->dev);

	pm_runtime_put_autosuspend(dev->dev);

unlock:

	mutex_unlock(&dev->mlock);

	return ret;

}



static int mchp_spdifrx_cs1_get(struct snd_kcontrol *kcontrol,
@@ -564,29 +620,56 @@ static int mchp_spdifrx_subcode_ch_get(struct mchp_spdifrx_dev *dev, 
				       int channel,

				       struct snd_ctl_elem_value *uvalue)

{

	unsigned long flags;

	struct mchp_spdifrx_mixer_control *ctrl = &dev->control;

	struct mchp_spdifrx_user_data *user_data = &ctrl->user_data[channel];

	int ret;

	int ret = 0;



	mutex_lock(&dev->mlock);



	ret = pm_runtime_resume_and_get(dev->dev);

	if (ret < 0)

		goto unlock;



	/*

	 * We may reach this point with both clocks enabled but the receiver

	 * still disabled. To void waiting for completion to just timeout we

	 * check here the dev->trigger_enabled flag.

	 *

	 * To retrieve data:

	 * - if the receiver is enabled we need to wait for blockend IRQ to read

	 *   data to and update it for us in software caches

	 * - otherwise reading the SPDIFRX_CHUD() registers is enough.

	 */



	if (dev->trigger_enabled) {

		reinit_completion(&user_data->done);

	mchp_spdifrx_isr_blockend_en(dev);

		regmap_write(dev->regmap, SPDIFRX_IER, SPDIFRX_IR_BLOCKEND);

		ret = wait_for_completion_interruptible_timeout(&user_data->done,

								msecs_to_jiffies(100));

	/* IP might not be started or valid stream might not be present */

		/* Valid stream might not be present. */

		if (ret <= 0) {

			dev_dbg(dev->dev, "user data for channel %d timeout\n",

				channel);

		mchp_spdifrx_isr_blockend_dis(dev);

		return ret;

			regmap_write(dev->regmap, SPDIFRX_IDR, SPDIFRX_IR_BLOCKEND);

			ret = ret ? : -ETIMEDOUT;

			goto pm_runtime_put;

		} else {

			ret = 0;

		}

	} else {

		/* Update software cache with last available data. */

		mchp_spdifrx_channel_user_data_read(dev, channel);

	}



	spin_lock_irqsave(&user_data->lock, flags);

	memcpy(uvalue->value.iec958.subcode, user_data->data,

	       sizeof(user_data->data));

	spin_unlock_irqrestore(&user_data->lock, flags);



	return 0;

pm_runtime_put:

	pm_runtime_mark_last_busy(dev->dev);

	pm_runtime_put_autosuspend(dev->dev);

unlock:

	mutex_unlock(&dev->mlock);

	return ret;

}



static int mchp_spdifrx_subcode_ch1_get(struct snd_kcontrol *kcontrol,
@@ -625,12 +708,34 @@ static int mchp_spdifrx_ulock_get(struct snd_kcontrol *kcontrol, 
	struct mchp_spdifrx_dev *dev = snd_soc_dai_get_drvdata(dai);

	struct mchp_spdifrx_mixer_control *ctrl = &dev->control;

	u32 val;

	int ret;

	bool ulock_old = ctrl->ulock;



	mutex_lock(&dev->mlock);



	ret = pm_runtime_resume_and_get(dev->dev);

	if (ret < 0)

		goto unlock;



	/*

	 * The RSR.ULOCK has wrong value if both pclk and gclk are enabled

	 * and the receiver is disabled. Thus we take into account the

	 * dev->trigger_enabled here to return a real status.

	 */

	if (dev->trigger_enabled) {

		regmap_read(dev->regmap, SPDIFRX_RSR, &val);

		ctrl->ulock = !(val & SPDIFRX_RSR_ULOCK);

	} else {

		ctrl->ulock = 0;

	}



	uvalue->value.integer.value[0] = ctrl->ulock;



	pm_runtime_mark_last_busy(dev->dev);

	pm_runtime_put_autosuspend(dev->dev);

unlock:

	mutex_unlock(&dev->mlock);



	return ulock_old != ctrl->ulock;

}
@@ -641,10 +746,32 @@ static int mchp_spdifrx_badf_get(struct snd_kcontrol *kcontrol, 
	struct mchp_spdifrx_dev *dev = snd_soc_dai_get_drvdata(dai);

	struct mchp_spdifrx_mixer_control *ctrl = &dev->control;

	u32 val;

	int ret;

	bool badf_old = ctrl->badf;



	mutex_lock(&dev->mlock);



	ret = pm_runtime_resume_and_get(dev->dev);

	if (ret < 0)

		goto unlock;



	/*

	 * The RSR.ULOCK has wrong value if both pclk and gclk are enabled

	 * and the receiver is disabled. Thus we take into account the

	 * dev->trigger_enabled here to return a real status.

	 */

	if (dev->trigger_enabled) {

		regmap_read(dev->regmap, SPDIFRX_RSR, &val);

		ctrl->badf = !!(val & SPDIFRX_RSR_BADF);

	} else {

		ctrl->badf = 0;

	}



	pm_runtime_mark_last_busy(dev->dev);

	pm_runtime_put_autosuspend(dev->dev);

unlock:

	mutex_unlock(&dev->mlock);



	uvalue->value.integer.value[0] = ctrl->badf;



	return badf_old != ctrl->badf;
@@ -656,11 +783,49 @@ static int mchp_spdifrx_signal_get(struct snd_kcontrol *kcontrol, 
	struct snd_soc_dai *dai = snd_kcontrol_chip(kcontrol);

	struct mchp_spdifrx_dev *dev = snd_soc_dai_get_drvdata(dai);

	struct mchp_spdifrx_mixer_control *ctrl = &dev->control;

	u32 val;

	u32 val = ~0U, loops = 10;

	int ret;

	bool signal_old = ctrl->signal;



	mutex_lock(&dev->mlock);



	ret = pm_runtime_resume_and_get(dev->dev);

	if (ret < 0)

		goto unlock;



	/*

	 * To get the signal we need to have receiver enabled. This

	 * could be enabled also from trigger() function thus we need to

	 * take care of not disabling the receiver when it runs.

	 */

	if (!dev->trigger_enabled) {

		regmap_update_bits(dev->regmap, SPDIFRX_MR, SPDIFRX_MR_RXEN_MASK,

				   SPDIFRX_MR_RXEN_ENABLE);



		/* Wait for RSR.ULOCK bit. */

		while (--loops) {

			regmap_read(dev->regmap, SPDIFRX_RSR, &val);

			if (!(val & SPDIFRX_RSR_ULOCK))

				break;

			usleep_range(100, 150);

		}



		regmap_update_bits(dev->regmap, SPDIFRX_MR, SPDIFRX_MR_RXEN_MASK,

				   SPDIFRX_MR_RXEN_DISABLE);

	} else {

		regmap_read(dev->regmap, SPDIFRX_RSR, &val);

	}



	pm_runtime_mark_last_busy(dev->dev);

	pm_runtime_put_autosuspend(dev->dev);



unlock:

	mutex_unlock(&dev->mlock);



	if (!(val & SPDIFRX_RSR_ULOCK))

		ctrl->signal = !(val & SPDIFRX_RSR_NOSIGNAL);

	else

		ctrl->signal = 0;

	uvalue->value.integer.value[0] = ctrl->signal;



	return signal_old != ctrl->signal;
@@ -682,22 +847,44 @@ static int mchp_spdifrx_rate_get(struct snd_kcontrol *kcontrol, 
{

	struct snd_soc_dai *dai = snd_kcontrol_chip(kcontrol);

	struct mchp_spdifrx_dev *dev = snd_soc_dai_get_drvdata(dai);

	unsigned long rate;

	u32 val;

	int rate;

	int ret;



	regmap_read(dev->regmap, SPDIFRX_RSR, &val);

	mutex_lock(&dev->mlock);



	ret = pm_runtime_resume_and_get(dev->dev);

	if (ret < 0)

		goto unlock;



	/* if the receiver is not locked, ISF data is invalid */

	/*

	 * The RSR.ULOCK has wrong value if both pclk and gclk are enabled

	 * and the receiver is disabled. Thus we take into account the

	 * dev->trigger_enabled here to return a real status.

	 */

	if (dev->trigger_enabled) {

		regmap_read(dev->regmap, SPDIFRX_RSR, &val);

		/* If the receiver is not locked, ISF data is invalid. */

		if (val & SPDIFRX_RSR_ULOCK || !(val & SPDIFRX_RSR_IFS_MASK)) {

			ucontrol->value.integer.value[0] = 0;

		return 0;

			goto pm_runtime_put;

		}

	} else {

		/* Reveicer is not locked, IFS data is invalid. */

		ucontrol->value.integer.value[0] = 0;

		goto pm_runtime_put;

	}



	rate = clk_get_rate(dev->gclk);



	ucontrol->value.integer.value[0] = rate / (32 * SPDIFRX_RSR_IFS(val));



	return 0;

pm_runtime_put:

	pm_runtime_mark_last_busy(dev->dev);

	pm_runtime_put_autosuspend(dev->dev);

unlock:

	mutex_unlock(&dev->mlock);

	return ret;

}



static struct snd_kcontrol_new mchp_spdifrx_ctrls[] = {
@@ -787,14 +974,6 @@ static int mchp_spdifrx_dai_probe(struct snd_soc_dai *dai) 
	struct mchp_spdifrx_dev *dev = snd_soc_dai_get_drvdata(dai);

	struct mchp_spdifrx_mixer_control *ctrl = &dev->control;

	int ch;

	int err;



	err = clk_prepare_enable(dev->pclk);

	if (err) {

		dev_err(dev->dev,

			"failed to enable the peripheral clock: %d\n", err);

		return err;

	}



	snd_soc_dai_init_dma_data(dai, NULL, &dev->capture);
@@ -808,11 +987,9 @@ static int mchp_spdifrx_dai_probe(struct snd_soc_dai *dai) 
		     SPDIFRX_MR_AUTORST_NOACTION |

		     SPDIFRX_MR_PACK_DISABLED);



	dev->blockend_refcount = 0;

	for (ch = 0; ch < SPDIFRX_CHANNELS; ch++) {

		init_completion(&ctrl->ch_stat[ch].done);

		init_completion(&ctrl->user_data[ch].done);

		spin_lock_init(&ctrl->user_data[ch].lock);

	}



	/* Add controls */
@@ -827,9 +1004,7 @@ static int mchp_spdifrx_dai_remove(struct snd_soc_dai *dai) 
	struct mchp_spdifrx_dev *dev = snd_soc_dai_get_drvdata(dai);



	/* Disable interrupts */

	regmap_write(dev->regmap, SPDIFRX_IDR, 0xFF);



	clk_disable_unprepare(dev->pclk);

	regmap_write(dev->regmap, SPDIFRX_IDR, GENMASK(14, 0));



	return 0;

}
@@ -861,6 +1036,48 @@ static const struct of_device_id mchp_spdifrx_dt_ids[] = { 
};

MODULE_DEVICE_TABLE(of, mchp_spdifrx_dt_ids);



static int mchp_spdifrx_runtime_suspend(struct device *dev)

{

	struct mchp_spdifrx_dev *spdifrx = dev_get_drvdata(dev);



	regcache_cache_only(spdifrx->regmap, true);

	clk_disable_unprepare(spdifrx->gclk);

	clk_disable_unprepare(spdifrx->pclk);



	return 0;

}



static int mchp_spdifrx_runtime_resume(struct device *dev)

{

	struct mchp_spdifrx_dev *spdifrx = dev_get_drvdata(dev);

	int ret;



	ret = clk_prepare_enable(spdifrx->pclk);

	if (ret)

		return ret;



	ret = clk_prepare_enable(spdifrx->gclk);

	if (ret)

		goto disable_pclk;



	regcache_cache_only(spdifrx->regmap, false);

	regcache_mark_dirty(spdifrx->regmap);

	ret = regcache_sync(spdifrx->regmap);

	if (ret) {

		regcache_cache_only(spdifrx->regmap, true);

		clk_disable_unprepare(spdifrx->gclk);

disable_pclk:

		clk_disable_unprepare(spdifrx->pclk);

	}



	return ret;

}



static const struct dev_pm_ops mchp_spdifrx_pm_ops = {

	RUNTIME_PM_OPS(mchp_spdifrx_runtime_suspend, mchp_spdifrx_runtime_resume,

		       NULL)

};



static int mchp_spdifrx_probe(struct platform_device *pdev)

{

	struct mchp_spdifrx_dev *dev;
@@ -913,19 +1130,36 @@ static int mchp_spdifrx_probe(struct platform_device *pdev) 
			"failed to get the PMC generated clock: %d\n", err);

		return err;

	}

	spin_lock_init(&dev->blockend_lock);



	/*

	 * Signal control need a valid rate on gclk. hw_params() configures

	 * it propertly but requesting signal before any hw_params() has been

	 * called lead to invalid value returned for signal. Thus, configure

	 * gclk at a valid rate, here, in initialization, to simplify the

	 * control path.

	 */

	clk_set_min_rate(dev->gclk, 48000 * SPDIFRX_GCLK_RATIO_MIN + 1);



	mutex_init(&dev->mlock);



	dev->dev = &pdev->dev;

	dev->regmap = regmap;

	platform_set_drvdata(pdev, dev);



	pm_runtime_enable(dev->dev);

	if (!pm_runtime_enabled(dev->dev)) {

		err = mchp_spdifrx_runtime_resume(dev->dev);

		if (err)

			goto pm_runtime_disable;

	}



	dev->capture.addr	= (dma_addr_t)mem->start + SPDIFRX_RHR;

	dev->capture.maxburst	= 1;



	err = devm_snd_dmaengine_pcm_register(&pdev->dev, NULL, 0);

	if (err) {

		dev_err(&pdev->dev, "failed to register PCM: %d\n", err);

		return err;

		goto pm_runtime_suspend;

	}



	err = devm_snd_soc_register_component(&pdev->dev,
@@ -933,20 +1167,40 @@ static int mchp_spdifrx_probe(struct platform_device *pdev) 
					      &mchp_spdifrx_dai, 1);

	if (err) {

		dev_err(&pdev->dev, "fail to register dai\n");

		return err;

		goto pm_runtime_suspend;

	}



	regmap_read(regmap, SPDIFRX_VERSION, &vers);

	dev_info(&pdev->dev, "hw version: %#lx\n", vers & SPDIFRX_VERSION_MASK);



	return 0;



pm_runtime_suspend:

	if (!pm_runtime_status_suspended(dev->dev))

		mchp_spdifrx_runtime_suspend(dev->dev);

pm_runtime_disable:

	pm_runtime_disable(dev->dev);

	return err;

}



static int mchp_spdifrx_remove(struct platform_device *pdev)

{

	struct mchp_spdifrx_dev *dev = platform_get_drvdata(pdev);



	pm_runtime_disable(dev->dev);

	if (!pm_runtime_status_suspended(dev->dev))

		mchp_spdifrx_runtime_suspend(dev->dev);



	return 0;

}



static struct platform_driver mchp_spdifrx_driver = {

	.probe	= mchp_spdifrx_probe,

	.remove = mchp_spdifrx_remove,

	.driver	= {

		.name	= "mchp_spdifrx",

		.of_match_table = of_match_ptr(mchp_spdifrx_dt_ids),

		.pm	= pm_ptr(&mchp_spdifrx_pm_ops),

	},

};