Loading drivers/mmc/host/dw_mmc.c +0 −19 Original line number Diff line number Diff line Loading @@ -1634,12 +1634,6 @@ static int dw_mci_command_complete(struct dw_mci *host, struct mmc_command *cmd) else cmd->error = 0; if (cmd->error) { /* newer ip versions need a delay between retries */ if (host->quirks & DW_MCI_QUIRK_RETRY_DELAY) mdelay(20); } return cmd->error; } Loading Loading @@ -2355,16 +2349,6 @@ static irqreturn_t dw_mci_interrupt(int irq, void *dev_id) pending = mci_readl(host, MINTSTS); /* read-only mask reg */ /* * DTO fix - version 2.10a and below, and only if internal DMA * is configured. */ if (host->quirks & DW_MCI_QUIRK_IDMAC_DTO) { if (!pending && ((mci_readl(host, STATUS) >> 17) & 0x1fff)) pending |= SDMMC_INT_DATA_OVER; } if (pending) { /* Check volt switch first, since it can look like an error */ if ((host->state == STATE_SENDING_CMD11) && Loading Loading @@ -3165,9 +3149,6 @@ int dw_mci_probe(struct dw_mci *host) /* Now that slots are all setup, we can enable card detect */ dw_mci_enable_cd(host); if (host->quirks & DW_MCI_QUIRK_IDMAC_DTO) dev_info(host->dev, "Internal DMAC interrupt fix enabled.\n"); return 0; err_dmaunmap: Loading include/linux/mmc/dw_mmc.h +2 −8 Original line number Diff line number Diff line Loading @@ -235,16 +235,10 @@ struct dw_mci_dma_ops { }; /* IP Quirks/flags. */ /* DTO fix for command transmission with IDMAC configured */ #define DW_MCI_QUIRK_IDMAC_DTO BIT(0) /* delay needed between retries on some 2.11a implementations */ #define DW_MCI_QUIRK_RETRY_DELAY BIT(1) /* High Speed Capable - Supports HS cards (up to 50MHz) */ #define DW_MCI_QUIRK_HIGHSPEED BIT(2) /* Unreliable card detection */ #define DW_MCI_QUIRK_BROKEN_CARD_DETECTION BIT(3) #define DW_MCI_QUIRK_BROKEN_CARD_DETECTION BIT(0) /* Timer for broken data transfer over scheme */ #define DW_MCI_QUIRK_BROKEN_DTO BIT(4) #define DW_MCI_QUIRK_BROKEN_DTO BIT(1) struct dma_pdata; Loading Loading
drivers/mmc/host/dw_mmc.c +0 −19 Original line number Diff line number Diff line Loading @@ -1634,12 +1634,6 @@ static int dw_mci_command_complete(struct dw_mci *host, struct mmc_command *cmd) else cmd->error = 0; if (cmd->error) { /* newer ip versions need a delay between retries */ if (host->quirks & DW_MCI_QUIRK_RETRY_DELAY) mdelay(20); } return cmd->error; } Loading Loading @@ -2355,16 +2349,6 @@ static irqreturn_t dw_mci_interrupt(int irq, void *dev_id) pending = mci_readl(host, MINTSTS); /* read-only mask reg */ /* * DTO fix - version 2.10a and below, and only if internal DMA * is configured. */ if (host->quirks & DW_MCI_QUIRK_IDMAC_DTO) { if (!pending && ((mci_readl(host, STATUS) >> 17) & 0x1fff)) pending |= SDMMC_INT_DATA_OVER; } if (pending) { /* Check volt switch first, since it can look like an error */ if ((host->state == STATE_SENDING_CMD11) && Loading Loading @@ -3165,9 +3149,6 @@ int dw_mci_probe(struct dw_mci *host) /* Now that slots are all setup, we can enable card detect */ dw_mci_enable_cd(host); if (host->quirks & DW_MCI_QUIRK_IDMAC_DTO) dev_info(host->dev, "Internal DMAC interrupt fix enabled.\n"); return 0; err_dmaunmap: Loading
include/linux/mmc/dw_mmc.h +2 −8 Original line number Diff line number Diff line Loading @@ -235,16 +235,10 @@ struct dw_mci_dma_ops { }; /* IP Quirks/flags. */ /* DTO fix for command transmission with IDMAC configured */ #define DW_MCI_QUIRK_IDMAC_DTO BIT(0) /* delay needed between retries on some 2.11a implementations */ #define DW_MCI_QUIRK_RETRY_DELAY BIT(1) /* High Speed Capable - Supports HS cards (up to 50MHz) */ #define DW_MCI_QUIRK_HIGHSPEED BIT(2) /* Unreliable card detection */ #define DW_MCI_QUIRK_BROKEN_CARD_DETECTION BIT(3) #define DW_MCI_QUIRK_BROKEN_CARD_DETECTION BIT(0) /* Timer for broken data transfer over scheme */ #define DW_MCI_QUIRK_BROKEN_DTO BIT(4) #define DW_MCI_QUIRK_BROKEN_DTO BIT(1) struct dma_pdata; Loading