Commit 01543dcf authored by Arthur Grillo's avatar Arthur Grillo Committed by Alex Deucher
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drm/amd/display: Fix excess arguments on kernel-doc 



Remove arguments present on kernel-doc that are not present on the
function declaration and add the new ones if present.

Signed-off-by: default avatarArthur Grillo <arthurgrillo@riseup.net>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 8dc2507f

drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c

+7 −8
Original line number Diff line number Diff line
@@ -273,8 +273,6 @@ static void sdma_v6_0_ring_emit_ib(struct amdgpu_ring *ring, 
 * sdma_v6_0_ring_emit_mem_sync - flush the IB by graphics cache rinse

 *

 * @ring: amdgpu ring pointer

 * @job: job to retrieve vmid from

 * @ib: IB object to schedule

 *

 * flush the IB by graphics cache rinse.

 */
@@ -326,7 +324,9 @@ static void sdma_v6_0_ring_emit_hdp_flush(struct amdgpu_ring *ring) 
 * sdma_v6_0_ring_emit_fence - emit a fence on the DMA ring

 *

 * @ring: amdgpu ring pointer

 * @fence: amdgpu fence object

 * @addr: address

 * @seq: fence seq number

 * @flags: fence flags

 *

 * Add a DMA fence packet to the ring to write

 * the fence seq number and DMA trap packet to generate
@@ -1060,10 +1060,9 @@ static void sdma_v6_0_vm_copy_pte(struct amdgpu_ib *ib, 
 *

 * @ib: indirect buffer to fill with commands

 * @pe: addr of the page entry

 * @addr: dst addr to write into pe

 * @value: dst addr to write into pe

 * @count: number of page entries to update

 * @incr: increase next addr by incr bytes

 * @flags: access flags

 *

 * Update PTEs by writing them manually using sDMA.

 */
@@ -1167,7 +1166,6 @@ static void sdma_v6_0_ring_emit_pipeline_sync(struct amdgpu_ring *ring) 
 * sdma_v6_0_ring_emit_vm_flush - vm flush using sDMA

 *

 * @ring: amdgpu_ring pointer

 * @vm: amdgpu_vm pointer

 *

 * Update the page table base and flush the VM TLB

 * using sDMA.
@@ -1591,10 +1589,11 @@ static void sdma_v6_0_set_irq_funcs(struct amdgpu_device *adev) 
/**

 * sdma_v6_0_emit_copy_buffer - copy buffer using the sDMA engine

 *

 * @ring: amdgpu_ring structure holding ring information

 * @ib: indirect buffer to fill with commands

 * @src_offset: src GPU address

 * @dst_offset: dst GPU address

 * @byte_count: number of bytes to xfer

 * @tmz: if a secure copy should be used

 *

 * Copy GPU buffers using the DMA engine.

 * Used by the amdgpu ttm implementation to move pages if
@@ -1620,7 +1619,7 @@ static void sdma_v6_0_emit_copy_buffer(struct amdgpu_ib *ib, 
/**

 * sdma_v6_0_emit_fill_buffer - fill buffer using the sDMA engine

 *

 * @ring: amdgpu_ring structure holding ring information

 * @ib: indirect buffer to fill

 * @src_data: value to write to buffer

 * @dst_offset: dst GPU address

 * @byte_count: number of bytes to xfer

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

+1 −1
Original line number Diff line number Diff line
@@ -698,7 +698,7 @@ static void populate_subvp_cmd_pipe_info(struct dc *dc, 
 *

 * @dc: [in] current dc state

 * @context: [in] new dc state

 * @cmd: [in] DMUB cmd to be populated with SubVP info

 * @enable: [in] if true enables the pipes population

 *

 * This function loops through each pipe and populates the DMUB SubVP CMD info

 * based on the pipe (e.g. SubVP, VBLANK).

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c

+1 −1
Original line number Diff line number Diff line
@@ -581,7 +581,7 @@ static void dpp1_dscl_set_manual_ratio_init( 
 * dpp1_dscl_set_recout - Set the first pixel of RECOUT in the OTG active area

 *

 * @dpp: DPP data struct

 * @recount: Rectangle information

 * @recout: Rectangle information

 *

 * This function sets the MPC RECOUT_START and RECOUT_SIZE registers based on

 * the values specified in the recount parameter.