Commit 014a9f20 authored by Bibo Mao's avatar Bibo Mao Committed by Xianglai Li
Browse files

LoongArch: KVM: Allow to access HW timer CSR registers always 

mainline inclusion
from mainline-v6.8-rc1
commit 0d2abe67029644741bf7400b0d00c2faa3e1c455
category: feature
bugzilla: https://gitee.com/openeuler/kernel/issues/I94LRF


CVE: NA

--------------------------------

Currently HW timer CSR registers are allowed to access before entering
to vm and disabled if switch to SW timer in host mode, instead it is not
necessary to do so. HW timer CSR registers can be accessed always, it
is nothing to do with whether it is in vm mode or host mode. This patch
removes the limitation.

Signed-off-by: default avatarBibo Mao <maobibo@loongson.cn>
Signed-off-by: default avatarHuacai Chen <chenhuacai@loongson.cn>
Signed-off-by: default avatarXianglai Li <lixianglai@loongson.cn>
parent 46f2c307

arch/loongarch/kvm/main.c

+0 −1
Original line number Diff line number Diff line
@@ -287,7 +287,6 @@ int kvm_arch_hardware_enable(void) 
	if (env & CSR_GCFG_MATC_ROOT)

		gcfg |= CSR_GCFG_MATC_ROOT;



	gcfg |= CSR_GCFG_TIT;

	write_csr_gcfg(gcfg);



	kvm_flush_tlb_all();

arch/loongarch/kvm/timer.c

+6 −21
Original line number Diff line number Diff line
@@ -70,15 +70,6 @@ void kvm_init_timer(struct kvm_vcpu *vcpu, unsigned long timer_hz) 
 */

void kvm_acquire_timer(struct kvm_vcpu *vcpu)

{

	unsigned long cfg;



	cfg = read_csr_gcfg();

	if (!(cfg & CSR_GCFG_TIT))

		return;



	/* Enable guest access to hard timer */

	write_csr_gcfg(cfg & ~CSR_GCFG_TIT);



	/*

	 * Freeze the soft-timer and sync the guest stable timer with it. We do

	 * this with interrupts disabled to avoid latency.
@@ -174,21 +165,15 @@ static void _kvm_save_timer(struct kvm_vcpu *vcpu) 
 */

void kvm_save_timer(struct kvm_vcpu *vcpu)

{

	unsigned long cfg;

	struct loongarch_csrs *csr = vcpu->arch.csr;



	preempt_disable();

	cfg = read_csr_gcfg();

	if (!(cfg & CSR_GCFG_TIT)) {

		/* Disable guest use of hard timer */

		write_csr_gcfg(cfg | CSR_GCFG_TIT);



	/* Save hard timer state */

	kvm_save_hw_gcsr(csr, LOONGARCH_CSR_TCFG);

	kvm_save_hw_gcsr(csr, LOONGARCH_CSR_TVAL);

	if (kvm_read_sw_gcsr(csr, LOONGARCH_CSR_TCFG) & CSR_TCFG_EN)

		_kvm_save_timer(vcpu);

	}



	/* Save timer-related state to vCPU context */

	kvm_save_hw_gcsr(csr, LOONGARCH_CSR_ESTAT);