Loading arch/powerpc/include/asm/hw_irq.h +2 −3 Original line number Diff line number Diff line Loading @@ -25,9 +25,8 @@ #define PACA_IRQ_DBELL 0x02 #define PACA_IRQ_EE 0x04 #define PACA_IRQ_DEC 0x08 /* Or FIT */ #define PACA_IRQ_EE_EDGE 0x10 /* BookE only */ #define PACA_IRQ_HMI 0x20 #define PACA_IRQ_PMI 0x40 #define PACA_IRQ_HMI 0x10 #define PACA_IRQ_PMI 0x20 /* * Some soft-masked interrupts must be hard masked until they are replayed Loading arch/powerpc/kernel/exceptions-64e.S +0 −1 Original line number Diff line number Diff line Loading @@ -988,7 +988,6 @@ kernel_dbg_exc: .endm masked_interrupt_book3e_0x500: // XXX When adding support for EPR, use PACA_IRQ_EE_EDGE masked_interrupt_book3e PACA_IRQ_EE 1 masked_interrupt_book3e_0x900: Loading arch/powerpc/kernel/irq.c +0 −23 Original line number Diff line number Diff line Loading @@ -181,16 +181,6 @@ notrace unsigned int __check_irq_replay(void) return 0x500; } /* * Check if an EPR external interrupt happened this bit is typically * set if we need to handle another "edge" interrupt from within the * MPIC "EPR" handler. */ if (happened & PACA_IRQ_EE_EDGE) { local_paca->irq_happened &= ~PACA_IRQ_EE_EDGE; return 0x500; } if (happened & PACA_IRQ_DBELL) { local_paca->irq_happened &= ~PACA_IRQ_DBELL; return 0x280; Loading Loading @@ -270,19 +260,6 @@ void replay_soft_interrupts(void) hard_irq_disable(); } /* * Check if an EPR external interrupt happened this bit is typically * set if we need to handle another "edge" interrupt from within the * MPIC "EPR" handler. */ if (IS_ENABLED(CONFIG_PPC_BOOK3E) && (happened & PACA_IRQ_EE_EDGE)) { local_paca->irq_happened &= ~PACA_IRQ_EE_EDGE; regs.trap = 0x500; do_IRQ(®s); if (!(local_paca->irq_happened & PACA_IRQ_HARD_DIS)) hard_irq_disable(); } if (IS_ENABLED(CONFIG_PPC_DOORBELL) && (happened & PACA_IRQ_DBELL)) { local_paca->irq_happened &= ~PACA_IRQ_DBELL; if (IS_ENABLED(CONFIG_PPC_BOOK3E)) Loading Loading
arch/powerpc/include/asm/hw_irq.h +2 −3 Original line number Diff line number Diff line Loading @@ -25,9 +25,8 @@ #define PACA_IRQ_DBELL 0x02 #define PACA_IRQ_EE 0x04 #define PACA_IRQ_DEC 0x08 /* Or FIT */ #define PACA_IRQ_EE_EDGE 0x10 /* BookE only */ #define PACA_IRQ_HMI 0x20 #define PACA_IRQ_PMI 0x40 #define PACA_IRQ_HMI 0x10 #define PACA_IRQ_PMI 0x20 /* * Some soft-masked interrupts must be hard masked until they are replayed Loading
arch/powerpc/kernel/exceptions-64e.S +0 −1 Original line number Diff line number Diff line Loading @@ -988,7 +988,6 @@ kernel_dbg_exc: .endm masked_interrupt_book3e_0x500: // XXX When adding support for EPR, use PACA_IRQ_EE_EDGE masked_interrupt_book3e PACA_IRQ_EE 1 masked_interrupt_book3e_0x900: Loading
arch/powerpc/kernel/irq.c +0 −23 Original line number Diff line number Diff line Loading @@ -181,16 +181,6 @@ notrace unsigned int __check_irq_replay(void) return 0x500; } /* * Check if an EPR external interrupt happened this bit is typically * set if we need to handle another "edge" interrupt from within the * MPIC "EPR" handler. */ if (happened & PACA_IRQ_EE_EDGE) { local_paca->irq_happened &= ~PACA_IRQ_EE_EDGE; return 0x500; } if (happened & PACA_IRQ_DBELL) { local_paca->irq_happened &= ~PACA_IRQ_DBELL; return 0x280; Loading Loading @@ -270,19 +260,6 @@ void replay_soft_interrupts(void) hard_irq_disable(); } /* * Check if an EPR external interrupt happened this bit is typically * set if we need to handle another "edge" interrupt from within the * MPIC "EPR" handler. */ if (IS_ENABLED(CONFIG_PPC_BOOK3E) && (happened & PACA_IRQ_EE_EDGE)) { local_paca->irq_happened &= ~PACA_IRQ_EE_EDGE; regs.trap = 0x500; do_IRQ(®s); if (!(local_paca->irq_happened & PACA_IRQ_HARD_DIS)) hard_irq_disable(); } if (IS_ENABLED(CONFIG_PPC_DOORBELL) && (happened & PACA_IRQ_DBELL)) { local_paca->irq_happened &= ~PACA_IRQ_DBELL; if (IS_ENABLED(CONFIG_PPC_BOOK3E)) Loading