Commit 011ff616 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'mmc-v5.13-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc 

Pull MMC host fixes from Ulf Hansson:

 - Fix SD-card detection on Intel NUC10i3FNK4 (GL9755)

 - Replace WARN_ONCE with dev_warn_once for scatterlist offsets

 - Extend check of scatterlist size alignment with SD_IO_RW_EXTENDED

* tag 'mmc-v5.13-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc:
  mmc: sdhci-pci-gli: increase 1.8V regulator wait
  mmc: meson-gx: also check SD_IO_RW_EXTENDED for scatterlist size alignment
  mmc: meson-gx: make replace WARN_ONCE with dev_warn_once about scatterlist offset alignment
parents 5328bf8b a1149a6c

drivers/mmc/host/meson-gx-mmc.c

+5 −2
Original line number Diff line number Diff line
@@ -236,7 +236,8 @@ static void meson_mmc_get_transfer_mode(struct mmc_host *mmc, 
	if (host->dram_access_quirk)

		return;



	if (data->blocks > 1) {

	/* SD_IO_RW_EXTENDED (CMD53) can also use block mode under the hood */

	if (data->blocks > 1 || mrq->cmd->opcode == SD_IO_RW_EXTENDED) {

		/*

		 * In block mode DMA descriptor format, "length" field indicates

		 * number of blocks and there is no way to pass DMA size that
@@ -258,7 +259,9 @@ static void meson_mmc_get_transfer_mode(struct mmc_host *mmc, 
	for_each_sg(data->sg, sg, data->sg_len, i) {

		/* check for 8 byte alignment */

		if (sg->offset % 8) {

			WARN_ONCE(1, "unaligned scatterlist buffer\n");

			dev_warn_once(mmc_dev(mmc),

				      "unaligned sg offset %u, disabling descriptor DMA for transfer\n",

				      sg->offset);

			return;

		}

	}

drivers/mmc/host/sdhci-pci-gli.c

+6 −1
Original line number Diff line number Diff line
@@ -627,8 +627,13 @@ static void sdhci_gli_voltage_switch(struct sdhci_host *host) 
	 *

	 * Wait 5ms after set 1.8V signal enable in Host Control 2 register

	 * to ensure 1.8V signal enable bit is set by GL9750/GL9755.

	 *

	 * ...however, the controller in the NUC10i3FNK4 (a 9755) requires

	 * slightly longer than 5ms before the control register reports that

	 * 1.8V is ready, and far longer still before the card will actually

	 * work reliably.

	 */

	usleep_range(5000, 5500);

	usleep_range(100000, 110000);

}



static void sdhci_gl9750_reset(struct sdhci_host *host, u8 mask)