Commit 010ce438 authored by Geert Uytterhoeven's avatar Geert Uytterhoeven
Browse files

clk: renesas: r8a779a0: Add MSIOF clocks 



Add the module clocks used by the Clock-Synchronized Serial Interface
with FIFO (MSIOF) instances on the Renesas R-Car V3U (r8a779a0) SoC.

Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20201117090329.2128904-3-geert+renesas@glider.be
parent f08b0d84

drivers/clk/renesas/r8a779a0-cpg-mssr.c

+6 −0
Original line number Original line Diff line number Diff line
@@ -158,6 +158,12 @@ static const struct mssr_mod_clk r8a779a0_mod_clks[] __initconst = { 
	DEF_MOD("hscif1",	515,	R8A779A0_CLK_S1D2),

	DEF_MOD("hscif1",	515,	R8A779A0_CLK_S1D2),

	DEF_MOD("hscif2",	516,	R8A779A0_CLK_S1D2),

	DEF_MOD("hscif2",	516,	R8A779A0_CLK_S1D2),

	DEF_MOD("hscif3",	517,	R8A779A0_CLK_S1D2),

	DEF_MOD("hscif3",	517,	R8A779A0_CLK_S1D2),

	DEF_MOD("msi0",		618,	R8A779A0_CLK_MSO),

	DEF_MOD("msi1",		619,	R8A779A0_CLK_MSO),

	DEF_MOD("msi2",		620,	R8A779A0_CLK_MSO),

	DEF_MOD("msi3",		621,	R8A779A0_CLK_MSO),

	DEF_MOD("msi4",		622,	R8A779A0_CLK_MSO),

	DEF_MOD("msi5",		623,	R8A779A0_CLK_MSO),

	DEF_MOD("scif0",	702,	R8A779A0_CLK_S1D8),

	DEF_MOD("scif0",	702,	R8A779A0_CLK_S1D8),

	DEF_MOD("scif1",	703,	R8A779A0_CLK_S1D8),

	DEF_MOD("scif1",	703,	R8A779A0_CLK_S1D8),

	DEF_MOD("scif3",	704,	R8A779A0_CLK_S1D8),

	DEF_MOD("scif3",	704,	R8A779A0_CLK_S1D8),