Commit 008e5e99 authored by Longfang Liu's avatar Longfang Liu Committed by Alex Williamson
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hisi_acc_vfio_pci: Fix device data address combination problem 



The queue address of the accelerator device should be combined into
a dma address in a way of combining the low and high bits.
The previous combination is wrong and needs to be modified.

Reviewed-by: default avatarJason Gunthorpe <jgg@nvidia.com>
Signed-off-by: default avatarLongfang Liu <liulongfang@huawei.com>
Link: https://lore.kernel.org/r/20220926093332.28824-3-liulongfang@huawei.com


Signed-off-by: default avatarAlex Williamson <alex.williamson@redhat.com>
parent 948f5ada

drivers/vfio/pci/hisilicon/hisi_acc_vfio_pci.c

+4 −4
Original line number Original line Diff line number Diff line
@@ -520,12 +520,12 @@ static int vf_qm_state_save(struct hisi_acc_vf_core_device *hisi_acc_vdev, 
		return -EINVAL;

		return -EINVAL;





	/* Every reg is 32 bit, the dma address is 64 bit. */

	/* Every reg is 32 bit, the dma address is 64 bit. */

	vf_data->eqe_dma = vf_data->qm_eqc_dw[2];

	vf_data->eqe_dma = vf_data->qm_eqc_dw[1];

	vf_data->eqe_dma <<= QM_XQC_ADDR_OFFSET;

	vf_data->eqe_dma <<= QM_XQC_ADDR_OFFSET;

	vf_data->eqe_dma |= vf_data->qm_eqc_dw[1];

	vf_data->eqe_dma |= vf_data->qm_eqc_dw[0];

	vf_data->aeqe_dma = vf_data->qm_aeqc_dw[2];

	vf_data->aeqe_dma = vf_data->qm_aeqc_dw[1];

	vf_data->aeqe_dma <<= QM_XQC_ADDR_OFFSET;

	vf_data->aeqe_dma <<= QM_XQC_ADDR_OFFSET;

	vf_data->aeqe_dma |= vf_data->qm_aeqc_dw[1];

	vf_data->aeqe_dma |= vf_data->qm_aeqc_dw[0];





	/* Through SQC_BT/CQC_BT to get sqc and cqc address */

	/* Through SQC_BT/CQC_BT to get sqc and cqc address */

	ret = qm_get_sqc(vf_qm, &vf_data->sqc_dma);

	ret = qm_get_sqc(vf_qm, &vf_data->sqc_dma);