Commit 0066472d authored by Wesley Cheng's avatar Wesley Cheng Committed by Greg Kroah-Hartman
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usb: dwc3: Issue core soft reset before enabling run/stop



It is recommended by the Synopsis databook to issue a DCTL.CSftReset
when reconnecting from a device-initiated disconnect routine.  This
resolves issues with enumeration during fast composition switching
cases, which result in an unknown device on the host.

Reviewed-by: default avatarThinh Nguyen <Thinh.Nguyen@synopsys.com>
Signed-off-by: default avatarWesley Cheng <quic_wcheng@quicinc.com>
Link: https://lore.kernel.org/r/20220316011358.3057-1-quic_wcheng@quicinc.com


Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 5cd601e6
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+1 −3
Original line number Diff line number Diff line
@@ -115,8 +115,6 @@ void dwc3_set_prtcap(struct dwc3 *dwc, u32 mode)
	dwc->current_dr_role = mode;
}

static int dwc3_core_soft_reset(struct dwc3 *dwc);

static void __dwc3_set_mode(struct work_struct *work)
{
	struct dwc3 *dwc = work_to_dwc(work);
@@ -261,7 +259,7 @@ u32 dwc3_core_fifo_space(struct dwc3_ep *dep, u8 type)
 * dwc3_core_soft_reset - Issues core soft reset and PHY reset
 * @dwc: pointer to our context structure
 */
static int dwc3_core_soft_reset(struct dwc3 *dwc)
int dwc3_core_soft_reset(struct dwc3 *dwc)
{
	u32		reg;
	int		retries = 1000;
+2 −0
Original line number Diff line number Diff line
@@ -1532,6 +1532,8 @@ bool dwc3_has_imod(struct dwc3 *dwc);
int dwc3_event_buffers_setup(struct dwc3 *dwc);
void dwc3_event_buffers_cleanup(struct dwc3 *dwc);

int dwc3_core_soft_reset(struct dwc3 *dwc);

#if IS_ENABLED(CONFIG_USB_DWC3_HOST) || IS_ENABLED(CONFIG_USB_DWC3_DUAL_ROLE)
int dwc3_host_init(struct dwc3 *dwc);
void dwc3_host_exit(struct dwc3 *dwc);
+11 −0
Original line number Diff line number Diff line
@@ -2578,6 +2578,17 @@ static int dwc3_gadget_pullup(struct usb_gadget *g, int is_on)
						dwc->ev_buf->length;
		}
	} else {
		/*
		 * In the Synopsys DWC_usb31 1.90a programming guide section
		 * 4.1.9, it specifies that for a reconnect after a
		 * device-initiated disconnect requires a core soft reset
		 * (DCTL.CSftRst) before enabling the run/stop bit.
		 */
		spin_unlock_irqrestore(&dwc->lock, flags);
		dwc3_core_soft_reset(dwc);
		spin_lock_irqsave(&dwc->lock, flags);

		dwc3_event_buffers_setup(dwc);
		__dwc3_gadget_start(dwc);
	}