Unverified Commit 002103c0 authored by openeuler-ci-bot's avatar openeuler-ci-bot Committed by Gitee
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!15062 gpio: xilinx: Convert gpio_lock to raw spinlock 

Merge Pull Request from: @ci-robot 
 
PR sync from: Liu Chuang <liuchuang40@huawei.com>
https://mailweb.openeuler.org/hyperkitty/list/kernel@openeuler.org/message/NMHUB77BY2OWDRVDVTUAKSQTBXW72D6A/ 
 
https://gitee.com/src-openeuler/kernel/issues/IBL2TF 
 
Link:https://gitee.com/openeuler/kernel/pulls/15062

 

Reviewed-by: default avatarYe Weihua <yeweihua4@huawei.com>
Signed-off-by: default avatarZhang Peng <zhangpeng362@huawei.com>
parents 4956d864 e8bd8b6a

drivers/gpio/gpio-xilinx.c

+16 −16
Original line number Diff line number Diff line
@@ -66,7 +66,7 @@ struct xgpio_instance { 
	DECLARE_BITMAP(state, 64);

	DECLARE_BITMAP(last_irq_read, 64);

	DECLARE_BITMAP(dir, 64);

	spinlock_t gpio_lock;	/* For serializing operations */

	raw_spinlock_t gpio_lock;	/* For serializing operations */

	int irq;

	DECLARE_BITMAP(enable, 64);

	DECLARE_BITMAP(rising_edge, 64);
@@ -180,14 +180,14 @@ static void xgpio_set(struct gpio_chip *gc, unsigned int gpio, int val) 
	struct xgpio_instance *chip = gpiochip_get_data(gc);

	int bit = xgpio_to_bit(chip, gpio);



	spin_lock_irqsave(&chip->gpio_lock, flags);

	raw_spin_lock_irqsave(&chip->gpio_lock, flags);



	/* Write to GPIO signal and set its direction to output */

	__assign_bit(bit, chip->state, val);



	xgpio_write_ch(chip, XGPIO_DATA_OFFSET, bit, chip->state);



	spin_unlock_irqrestore(&chip->gpio_lock, flags);

	raw_spin_unlock_irqrestore(&chip->gpio_lock, flags);

}



/**
@@ -211,7 +211,7 @@ static void xgpio_set_multiple(struct gpio_chip *gc, unsigned long *mask, 
	bitmap_remap(hw_mask, mask, chip->sw_map, chip->hw_map, 64);

	bitmap_remap(hw_bits, bits, chip->sw_map, chip->hw_map, 64);



	spin_lock_irqsave(&chip->gpio_lock, flags);

	raw_spin_lock_irqsave(&chip->gpio_lock, flags);



	bitmap_replace(state, chip->state, hw_bits, hw_mask, 64);
@@ -219,7 +219,7 @@ static void xgpio_set_multiple(struct gpio_chip *gc, unsigned long *mask, 


	bitmap_copy(chip->state, state, 64);



	spin_unlock_irqrestore(&chip->gpio_lock, flags);

	raw_spin_unlock_irqrestore(&chip->gpio_lock, flags);

}



/**
@@ -237,13 +237,13 @@ static int xgpio_dir_in(struct gpio_chip *gc, unsigned int gpio) 
	struct xgpio_instance *chip = gpiochip_get_data(gc);

	int bit = xgpio_to_bit(chip, gpio);



	spin_lock_irqsave(&chip->gpio_lock, flags);

	raw_spin_lock_irqsave(&chip->gpio_lock, flags);



	/* Set the GPIO bit in shadow register and set direction as input */

	__set_bit(bit, chip->dir);

	xgpio_write_ch(chip, XGPIO_TRI_OFFSET, bit, chip->dir);



	spin_unlock_irqrestore(&chip->gpio_lock, flags);

	raw_spin_unlock_irqrestore(&chip->gpio_lock, flags);



	return 0;

}
@@ -266,7 +266,7 @@ static int xgpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val) 
	struct xgpio_instance *chip = gpiochip_get_data(gc);

	int bit = xgpio_to_bit(chip, gpio);



	spin_lock_irqsave(&chip->gpio_lock, flags);

	raw_spin_lock_irqsave(&chip->gpio_lock, flags);



	/* Write state of GPIO signal */

	__assign_bit(bit, chip->state, val);
@@ -276,7 +276,7 @@ static int xgpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val) 
	__clear_bit(bit, chip->dir);

	xgpio_write_ch(chip, XGPIO_TRI_OFFSET, bit, chip->dir);



	spin_unlock_irqrestore(&chip->gpio_lock, flags);

	raw_spin_unlock_irqrestore(&chip->gpio_lock, flags);



	return 0;

}
@@ -404,7 +404,7 @@ static void xgpio_irq_mask(struct irq_data *irq_data) 
	int bit = xgpio_to_bit(chip, irq_offset);

	u32 mask = BIT(bit / 32), temp;



	spin_lock_irqsave(&chip->gpio_lock, flags);

	raw_spin_lock_irqsave(&chip->gpio_lock, flags);



	__clear_bit(bit, chip->enable);
@@ -414,7 +414,7 @@ static void xgpio_irq_mask(struct irq_data *irq_data) 
		temp &= ~mask;

		xgpio_writereg(chip->regs + XGPIO_IPIER_OFFSET, temp);

	}

	spin_unlock_irqrestore(&chip->gpio_lock, flags);

	raw_spin_unlock_irqrestore(&chip->gpio_lock, flags);



	gpiochip_disable_irq(&chip->gc, irq_offset);

}
@@ -434,7 +434,7 @@ static void xgpio_irq_unmask(struct irq_data *irq_data) 


	gpiochip_enable_irq(&chip->gc, irq_offset);



	spin_lock_irqsave(&chip->gpio_lock, flags);

	raw_spin_lock_irqsave(&chip->gpio_lock, flags);



	__set_bit(bit, chip->enable);
@@ -453,7 +453,7 @@ static void xgpio_irq_unmask(struct irq_data *irq_data) 
		xgpio_writereg(chip->regs + XGPIO_IPIER_OFFSET, val);

	}



	spin_unlock_irqrestore(&chip->gpio_lock, flags);

	raw_spin_unlock_irqrestore(&chip->gpio_lock, flags);

}



/**
@@ -518,7 +518,7 @@ static void xgpio_irqhandler(struct irq_desc *desc) 


	chained_irq_enter(irqchip, desc);



	spin_lock(&chip->gpio_lock);

	raw_spin_lock(&chip->gpio_lock);



	xgpio_read_ch_all(chip, XGPIO_DATA_OFFSET, all);
@@ -535,7 +535,7 @@ static void xgpio_irqhandler(struct irq_desc *desc) 
	bitmap_copy(chip->last_irq_read, all, 64);

	bitmap_or(all, rising, falling, 64);



	spin_unlock(&chip->gpio_lock);

	raw_spin_unlock(&chip->gpio_lock);



	dev_dbg(gc->parent, "IRQ rising %*pb falling %*pb\n", 64, rising, 64, falling);
@@ -626,7 +626,7 @@ static int xgpio_probe(struct platform_device *pdev) 
	bitmap_set(chip->hw_map,  0, width[0]);

	bitmap_set(chip->hw_map, 32, width[1]);



	spin_lock_init(&chip->gpio_lock);

	raw_spin_lock_init(&chip->gpio_lock);



	chip->gc.base = -1;

	chip->gc.ngpio = bitmap_weight(chip->hw_map, 64);