Commit 00173879 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'irq-core-2023-06-26' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tip/tip 

Pull irq updates from Thomas Gleixner:
 "Updates for the interrupt subsystem:

  Core:

   - Convert the interrupt descriptor storage to a maple tree to
     overcome the limitations of the radixtree + fixed size bitmap.

     This allows us to handle very large servers with a huge number of
     guests without imposing a huge memory overhead on everyone

   - Implement optional retriggering of interrupts which utilize the
     fasteoi handler to work around a GICv3 architecture issue

  Drivers:

   - A set of fixes and updates for the Loongson/Loongarch related
     drivers

   - Workaound for an ASR8601 integration hickup which ends up with CPU
     numbering which can't be represented in the GIC implementation

   - The usual set of boring fixes and updates all over the place"

* tag 'irq-core-2023-06-26' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tip/tip: (27 commits)
  Revert "irqchip/mxs: Include linux/irqchip/mxs.h"
  irqchip/jcore-aic: Fix missing allocation of IRQ descriptors
  irqchip/stm32-exti: Fix warning on initialized field overwritten
  irqchip/stm32-exti: Add STM32MP15xx IWDG2 EXTI to GIC map
  irqchip/gicv3: Add a iort_pmsi_get_dev_id() prototype
  irqchip/mxs: Include linux/irqchip/mxs.h
  irqchip/clps711x: Remove unused clps711x_intc_init() function
  irqchip/mmp: Remove non-DT codepath
  irqchip/ftintc010: Mark all function static
  irqdomain: Include internals.h for function prototypes
  irqchip/loongson-eiointc: Add DT init support
  dt-bindings: interrupt-controller: Add Loongson EIOINTC
  irqchip/loongson-eiointc: Fix irq affinity setting during resume
  irqchip/loongson-liointc: Add IRQCHIP_SKIP_SET_WAKE flag
  irqchip/loongson-liointc: Fix IRQ trigger polarity
  irqchip/loongson-pch-pic: Fix potential incorrect hwirq assignment
  irqchip/loongson-pch-pic: Fix initialization of HT vector register
  irqchip/gic-v3-its: Enable RESEND_WHEN_IN_PROGRESS for LPIs
  genirq: Allow fasteoi handler to resend interrupts on concurrent handling
  genirq: Expand doc for PENDING and REPLAY flags
  ...
parents cef2dd76 f121ab7f

Documentation/arm64/silicon-errata.rst

+4 −0
Original line number Diff line number Diff line
@@ -214,3 +214,7 @@ stable kernels. 
+----------------+-----------------+-----------------+-----------------------------+

| Fujitsu        | A64FX           | E#010001        | FUJITSU_ERRATUM_010001      |

+----------------+-----------------+-----------------+-----------------------------+



+----------------+-----------------+-----------------+-----------------------------+

| ASR            | ASR8601         | #8601001        | N/A                         |

+----------------+-----------------+-----------------+-----------------------------+

Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml

0 → 100644
+59 −0
Original line number Diff line number Diff line 
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/interrupt-controller/loongson,eiointc.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Loongson Extended I/O Interrupt Controller



maintainers:

  - Binbin Zhou <zhoubinbin@loongson.cn>



description: |

  This interrupt controller is found on the Loongson-3 family chips and

  Loongson-2K series chips and is used to distribute interrupts directly to

  individual cores without forwarding them through the HT's interrupt line.



allOf:

  - $ref: /schemas/interrupt-controller.yaml#



properties:

  compatible:

    enum:

      - loongson,ls2k0500-eiointc

      - loongson,ls2k2000-eiointc



  reg:

    maxItems: 1



  interrupts:

    maxItems: 1



  interrupt-controller: true



  '#interrupt-cells':

    const: 1



required:

  - compatible

  - reg

  - interrupts

  - interrupt-controller

  - '#interrupt-cells'



unevaluatedProperties: false



examples:

  - |

    eiointc: interrupt-controller@1fe11600 {

      compatible = "loongson,ls2k0500-eiointc";

      reg = <0x1fe10000 0x10000>;



      interrupt-controller;

      #interrupt-cells = <1>;



      interrupt-parent = <&cpuintc>;

      interrupts = <3>;

    };



...

drivers/irqchip/irq-clps711x.c

+0 −7
Original line number Diff line number Diff line
@@ -212,12 +212,6 @@ static int __init _clps711x_intc_init(struct device_node *np, 
	return err;

}



void __init clps711x_intc_init(phys_addr_t base, resource_size_t size)

{

	BUG_ON(_clps711x_intc_init(NULL, base, size));

}



#ifdef CONFIG_IRQCHIP

static int __init clps711x_intc_init_dt(struct device_node *np,

					struct device_node *parent)

{
@@ -231,4 +225,3 @@ static int __init clps711x_intc_init_dt(struct device_node *np, 
	return _clps711x_intc_init(np, res.start, resource_size(&res));

}

IRQCHIP_DECLARE(clps711x, "cirrus,ep7209-intc", clps711x_intc_init_dt);
 
#endif

drivers/irqchip/irq-ftintc010.c

+2 −2
Original line number Diff line number Diff line
@@ -125,7 +125,7 @@ static struct irq_chip ft010_irq_chip = { 
/* Local static for the IRQ entry call */

static struct ft010_irq_data firq;



asmlinkage void __exception_irq_entry ft010_irqchip_handle_irq(struct pt_regs *regs)

static asmlinkage void __exception_irq_entry ft010_irqchip_handle_irq(struct pt_regs *regs)

{

	struct ft010_irq_data *f = &firq;

	int irq;
@@ -162,7 +162,7 @@ static const struct irq_domain_ops ft010_irqdomain_ops = { 
	.xlate = irq_domain_xlate_onetwocell,

};



int __init ft010_of_init_irq(struct device_node *node,

static int __init ft010_of_init_irq(struct device_node *node,

			      struct device_node *parent)

{

	struct ft010_irq_data *f = &firq;

drivers/irqchip/irq-gic-v3-its.c

+2 −0
Original line number Diff line number Diff line
@@ -3585,6 +3585,7 @@ static int its_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, 
		irqd = irq_get_irq_data(virq + i);

		irqd_set_single_target(irqd);

		irqd_set_affinity_on_activate(irqd);

		irqd_set_resend_when_in_progress(irqd);

		pr_debug("ID:%d pID:%d vID:%d\n",

			 (int)(hwirq + i - its_dev->event_map.lpi_base),

			 (int)(hwirq + i), virq + i);
@@ -4523,6 +4524,7 @@ static int its_vpe_irq_domain_alloc(struct irq_domain *domain, unsigned int virq 
		irq_domain_set_hwirq_and_chip(domain, virq + i, i,

					      irqchip, vm->vpes[i]);

		set_bit(i, bitmap);

		irqd_set_resend_when_in_progress(irq_get_irq_data(virq + i));

	}



	if (err) {